<?xml version="1.0" encoding="utf-8" standalone="no"?>
<device schemaVersion="1.1"
	xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"
	xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">

	<vendor>Puya</vendor>
	<vendorID>Puya</vendorID>
	<name>PY32F0xx_DFP</name>
	<!-- name of part-->
	<series>PY32F0</series>
	<version>1.0.0</version>
	<description>Arm 32-bit Cortex-M0+ Microcontroller based device, CPU clock up to 48 MHz.</description>

	<cpu>
		<!-- details about the cpu embedded in the device -->
		<name>CM0+</name>
		<revision>r0p1</revision>
		<endian>little</endian>
		<mpuPresent>false</mpuPresent>
		<fpuPresent>false</fpuPresent>
		<nvicPrioBits>4</nvicPrioBits>
		<vendorSystickConfig>false</vendorSystickConfig>
	</cpu>
	
	
	<addressUnitBits>8</addressUnitBits><!-- byte addressable memory -->
	<width>32</width>                   <!-- bus width is 32 bits --><!-- default settings implicitly inherited by subsequent sections -->
	<size>32</size>                    <!-- this is the default size (number of bits) of all peripherals and register that do not define "size" themselves -->
	<access>read-write</access>           <!-- default access permission for all subsequent registers -->
	<resetValue>0x00000000</resetValue>    <!-- by default all bits of the registers are initialized to 0 on reset -->
	<resetMask>0xFFFFFFFF</resetMask>           <!-- by default all 32Bits of the registers are used -->
	<peripherals>
		<peripheral>
			<name>ADC</name>
			<description>Analog to Digital Converter</description>
			<groupName>ADC</groupName>
			<baseAddress>0x40012400</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<interrupt>
				<name>ADC_COMP</name>
				<description>ADC and COMP Interrupt through EXTI Lines 17 and 18</description>
				<value>12</value>
			</interrupt>
			<registers>
				<register>
					<name>ISR</name>
					<displayName>ISR</displayName>
					<description>ADC interrupt and status register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>AWD</name>
							<description>ADC analog watchdog  flag</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OVR</name>
							<description>ADC group regular overrun
							flag</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EOSEQ</name>
							<description>ADC group regular end of sequence
							conversions flag</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EOC</name>
							<description>ADC group regular end of unitary
							conversion flag</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EOSMP</name>
							<description>ADC group regular end of sampling
							flag</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>IER</name>
					<displayName>IER</displayName>
					<description>ADC interrupt enable register</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>AWDIE</name>
							<description>ADC analog watchdog
							interrupt</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OVRIE</name>
							<description>ADC group regular overrun
							interrupt</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EOSEQIE</name>
							<description>ADC group regular end of sequence
							conversions interrupt</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EOCIE</name>
							<description>ADC group regular end of unitary
							conversion interrupt</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EOSMPIE</name>
							<description>ADC group regular end of sampling
							interrupt</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CR</name>
					<displayName>CR</displayName>
					<description>ADC control register</description>
					<addressOffset>0x8</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>ADCAL</name>
							<description>ADC group regular conversion
							calibration</description>
							<bitOffset>31</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ADSTP</name>
							<description>ADC group regular conversion
							stop</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ADSTART</name>
							<description>ADC group regular conversion
							start</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ADEN</name>
							<description>ADC enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CFGR1</name>
					<displayName>CFGR1</displayName>
					<description>ADC configuration register 1</description>
					<addressOffset>0xC</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>AWDCH</name>
							<description>ADC analog watchdog  monitored channel
							selection</description>
							<bitOffset>26</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AWDEN</name>
							<description>ADC analog watchdog  enable on scope
							ADC group regular</description>
							<bitOffset>23</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>AWDSGL</name>
							<description>ADC analog watchdog  monitoring a
							single channel or all channels</description>
							<bitOffset>22</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DISCEN</name>
							<description>ADC group regular sequencer
							discontinuous mode</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>WAIT</name>
							<description>Wait conversion mode</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CONT</name>
							<description>ADC group regular continuous conversion
							mode</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OVRMOD</name>
							<description>ADC group regular overrun
							configuration</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EXTEN</name>
							<description>ADC group regular external trigger
							polarity</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>EXTSEL</name>
							<description>ADC group regular external trigger
							source</description>
							<bitOffset>6</bitOffset>
							<bitWidth>3</bitWidth>
						</field>
						<field>
							<name>ALIGN</name>
							<description>ADC data alignement</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RESSEL</name>
							<description>ADC data resolution</description>
							<bitOffset>3</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>SCANDIR</name>
							<description>Scan sequence direction</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DMACFG</name>
							<description>ADC DMA transfer
							configuration</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DMAEN</name>
							<description>ADC DMA transfer enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CFGR2</name>
					<displayName>CFGR2</displayName>
					<description>ADC configuration register 2</description>
					<addressOffset>0x10</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>CKMODE</name>
							<description>ADC clock mode</description>
							<bitOffset>28</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>SMPR</name>
					<displayName>SMPR</displayName>
					<description>ADC sampling time register</description>
					<addressOffset>0x14</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>SMP</name>
							<description>Sampling time selection</description>
							<bitOffset>0</bitOffset>
							<bitWidth>3</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>TR</name>
					<displayName>TR</displayName>
					<description>ADC analog watchdog 1 threshold register</description>
					<addressOffset>0x20</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x0FFF0000</resetValue>
					<fields>
						<field>
							<name>HT</name>
							<description>ADC analog watchdog threshold
							high</description>
							<bitOffset>16</bitOffset>
							<bitWidth>12</bitWidth>
						</field>
						<field>
							<name>LT</name>
							<description>ADC analog watchdog threshold
							low</description>
							<bitOffset>0</bitOffset>
							<bitWidth>12</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CHSELR</name>
					<displayName>CHSELR</displayName>
					<description>ADC group regular sequencer register</description>
					<addressOffset>0x28</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x0FFF0000</resetValue>
					<fields>
						<field>
							<name>CHSEL12</name>
							<description>Channel-12 selection</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL11</name>
							<description>Channel-11 selection</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL9</name>
							<description>Channel-9 selection</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL8</name>
							<description>Channel-8 selection</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL7</name>
							<description>Channel-7 selection</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL6</name>
							<description>Channel-6 selection</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL5</name>
							<description>Channel-5 selection</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL4</name>
							<description>Channel-4 selection</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL3</name>
							<description>Channel-3 selection</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL2</name>
							<description>Channel-2 selection</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL1</name>
							<description>Channel-1 selection</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHSEL0</name>
							<description>Channel-0 selection</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>DR</name>
					<displayName>DR</displayName>
					<description>ADC group regular data register</description>
					<addressOffset>0x40</addressOffset>
					<size>0x20</size>
					<access>read-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>DATA</name>
							<description>ADC group regular conversion
							data</description>
							<bitOffset>0</bitOffset>
							<bitWidth>16</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CCSR</name>
					<displayName>CCSR</displayName>
					<description>ADC calibration configuration and status register</description>
					<addressOffset>0x44</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>CALON</name>
							<description>Calibration flag</description>
							<bitOffset>31</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-only</access>
						</field>
						<field>
							<name>CALFAIL</name>
							<description>Calibration fail flag</description>
							<bitOffset>30</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CALSET</name>
							<description>Calibration factor selection</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CALSMP</name>
							<description>Calibration sample time selection</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>CALSEL</name>
							<description>Calibration contents selection</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CALRR1</name>
					<displayName>CALRR1</displayName>
					<description>ADC calibration result register 1</description>
					<addressOffset>0x48</addressOffset>
					<size>0x20</size>
					<access>read-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>CALBOUT</name>
							<description>offset result</description>
							<bitOffset>16</bitOffset>
							<bitWidth>7</bitWidth>
						</field>
						<field>
							<name>CALC5OUT</name>
							<description>C5 result</description>
							<bitOffset>8</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
						<field>
							<name>CALC4OUT</name>
							<description>C4 result</description>
							<bitOffset>0</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CALRR2</name>
					<displayName>CALRR2</displayName>
					<description>ADC calibration result register 2</description>
					<addressOffset>0x4C</addressOffset>
					<size>0x20</size>
					<access>read-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>CALC3OUT</name>
							<description>C3 result</description>
							<bitOffset>24</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
						<field>
							<name>CALC2OUT</name>
							<description>C2 result</description>
							<bitOffset>16</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
						<field>
							<name>CALC1OUT</name>
							<description>C1 result</description>
							<bitOffset>8</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
						<field>
							<name>CALC0OUT</name>
							<description>C0 result</description>
							<bitOffset>0</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CALFIR1</name>
					<displayName>CALFIR1</displayName>
					<description>ADC calibration factor input register 1</description>
					<addressOffset>0x50</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>CALBIO</name>
							<description>Calibration offset factor input</description>
							<bitOffset>16</bitOffset>
							<bitWidth>7</bitWidth>
						</field>
						<field>
							<name>CALC5IO</name>
							<description>Calibration C5 factor input</description>
							<bitOffset>8</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
						<field>
							<name>CALC4IO</name>
							<description>Calibration C4 factor input</description>
							<bitOffset>0</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CALFIR2</name>
					<displayName>CALFIR2</displayName>
					<description>ADC calibration factor input register 2</description>
					<addressOffset>0x54</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>CALC3IO</name>
							<description>Calibration C3 factor input</description>
							<bitOffset>24</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
						<field>
							<name>CALC2IO</name>
							<description>Calibration C2 factor input</description>
							<bitOffset>16</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
						<field>
							<name>CALC1IO</name>
							<description>Calibration C1 factor input</description>
							<bitOffset>8</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
						<field>
							<name>CALC0IO</name>
							<description>Calibration C0 factor input</description>
							<bitOffset>0</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CCR</name>
					<displayName>CCR</displayName>
					<description>ADC common configuration register</description>
					<addressOffset>0x308</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>TSEN</name>
							<description>Temperature sensor enable</description>
							<bitOffset>23</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>VREFEN</name>
							<description>VREFINT enable</description>
							<bitOffset>22</bitOffset>
							<bitWidth>1</bitWidth>
						</field>						
					</fields>
				</register>
			</registers>
		</peripheral>
		<peripheral>
			<name>COMP1</name>
			<description>Comparator</description>
			<groupName>COMP</groupName>
			<baseAddress>0x40010200</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x10</size>
				<usage>registers</usage>
			</addressBlock>
			<registers>
				<register>
					<name>CSR</name>
					<displayName>CSR</displayName>
					<description>COMP control and status register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LOCK</name>
							<description>CSR register lock</description>
							<bitOffset>31</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>COMP_OUT</name>
							<description>Comparator output status</description>
							<bitOffset>30</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PWRMODE</name>
							<description>Comparator power mode
							selector</description>
							<bitOffset>18</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>HYST</name>
							<description>Comparator hysteresis enable
							selector</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>POLARITY</name>
							<description>Comparator polarity
							selector</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>WINMODE</name>
							<description>Comparator non-inverting input
							selector for window mode</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>INPSEL</name>
							<description>Comparator signal selector for
							non-inverting input</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>INMSEL</name>
							<description>Comparator signal selector for
							inverting input INM</description>
							<bitOffset>4</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>SCALER_EN</name>
							<description>SCALER enable bit</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>COMP_EN</name>
							<description>COMP enable bit</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>FR</name>
					<displayName>FR</displayName>
					<description>Comparator Filter
					register</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>FLTCNT</name>
							<description>Comparator filter and counter</description>
							<bitOffset>16</bitOffset>
							<bitWidth>16</bitWidth>
						</field>
						<field>
							<name>FLTEN</name>
							<description>Filter enable bit</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
			</registers>
		</peripheral>
		<peripheral>
			<name>COMP2</name>
			<description>Comparator</description>
			<groupName>COMP</groupName>
			<baseAddress>0x40010210</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x10</size>
				<usage>registers</usage>
			</addressBlock>
			<registers>
				<register>
					<name>CSR</name>
					<displayName>CSR</displayName>
					<description>COMP control and status register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LOCK</name>
							<description>CSR register lock</description>
							<bitOffset>31</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>COMP_OUT</name>
							<description>Comparator output status</description>
							<bitOffset>30</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PWRMODE</name>
							<description>Comparator power mode
							selector</description>
							<bitOffset>18</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>POLARITY</name>
							<description>Comparator polarity
							selector</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>WINMODE</name>
							<description>Comparator non-inverting input
							selector for window mode</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>INPSEL</name>
							<description>Comparator signal selector for
							non-inverting input</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>INMSEL</name>
							<description>Comparator signal selector for
							inverting input INM</description>
							<bitOffset>4</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>COMP_EN</name>
							<description>COMP enable bit</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>FR</name>
					<displayName>FR</displayName>
					<description>Comparator Filter
					register</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>FLTCNT</name>
							<description>Comparator filter and counter</description>
							<bitOffset>16</bitOffset>
							<bitWidth>16</bitWidth>
						</field>
						<field>
							<name>FLTEN</name>
							<description>Filter enable bit</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
			</registers>
		</peripheral>
		<peripheral>
			<name>RCC</name>
			<description>Reset and clock control</description>
			<groupName>RCC</groupName>
			<baseAddress>0x40021000</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<interrupt>
				<name>RCC</name>
				<description>RCC global Interrupt</description>
				<value>4</value>
			</interrupt>
			<registers>
				<register>
					<name>CR</name>
					<displayName>CR</displayName>
					<description>Clock control register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000100</resetValue>
					<fields>
						<field>
							<name>PLLRDY</name>
							<description>PLL clock ready flag</description>
							<bitOffset>25</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PLLON</name>
							<description>PLL enable</description>
							<bitOffset>24</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CSSON</name>
							<description>Clock security system
							enable</description>
							<bitOffset>19</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSEBYP</name>
							<description>HSE crystal oscillator
							bypass</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSERDY</name>
							<description>HSE clock ready flag</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSEON</name>
							<description>HSE clock enable</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSIDIV</name>
							<description>HSI16 clock division
							factor</description>
							<bitOffset>11</bitOffset>
							<bitWidth>3</bitWidth>
						</field>
						<field>
							<name>HSIRDY</name>
							<description>HSI16 clock ready flag</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSIKERON</name>
							<description>HSI16 always enable for peripheral
							kernels</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSION</name>
							<description>HSI16 clock enable</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>ICSCR</name>
					<displayName>ICSCR</displayName>
					<description>Internal clock sources calibration
					register</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<resetValue>0x10000000</resetValue>
					<fields>
						<field>
							<name>LSI_STARTUP</name>
							<description>LSI startup time </description>
							<bitOffset>26</bitOffset>
							<bitWidth>2</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>LSI_TRIM</name>
							<description>LSI clock trimming</description>
							<bitOffset>16</bitOffset>
							<bitWidth>9</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>HSI_FS</name>
							<description>HSI frequency selection</description>
							<bitOffset>13</bitOffset>
							<bitWidth>3</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>HSI_TRIM</name>
							<description>HSI clock trimming</description>
							<bitOffset>0</bitOffset>
							<bitWidth>13</bitWidth>
							<access>read-write</access>
						</field>
					</fields>
				</register>
				<register>
					<name>CFGR</name>
					<displayName>CFGR</displayName>
					<description>Clock configuration register</description>
					<addressOffset>0x8</addressOffset>
					<size>0x20</size>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>MCOPRE</name>
							<description>Microcontroller clock output
							prescaler</description>
							<bitOffset>28</bitOffset>
							<bitWidth>3</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>MCOSEL</name>
							<description>Microcontroller clock
							output</description>
							<bitOffset>24</bitOffset>
							<bitWidth>3</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>PPRE</name>
							<description>APB prescaler</description>
							<bitOffset>12</bitOffset>
							<bitWidth>3</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>HPRE</name>
							<description>AHB prescaler</description>
							<bitOffset>8</bitOffset>
							<bitWidth>4</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>SWS</name>
							<description>System clock switch status</description>
							<bitOffset>3</bitOffset>
							<bitWidth>3</bitWidth>
							<access>read-only</access>
						</field>
						<field>
							<name>SW</name>
							<description>System clock switch</description>
							<bitOffset>0</bitOffset>
							<bitWidth>3</bitWidth>
							<access>read-write</access>
						</field>
					</fields>
				</register>
				<register>
					<name>PLLCFGR</name>
					<displayName>PLLCFGR</displayName>
					<description>PLL configuration register</description>
					<addressOffset>0xC</addressOffset>
					<size>0x20</size>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>PLLSRC</name>
							<description>PLL clock source selection</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-write</access>
						</field>
					</fields>
				</register>
				<register>
					<name>ECSCR</name>
					<displayName>ECSCR</displayName>
					<description>External clock source control register</description>
					<addressOffset>0x10</addressOffset>
					<size>0x20</size>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LSE_DRIVER</name>
							<description>LSE clock driver selection</description>
							<bitOffset>16</bitOffset>
							<bitWidth>2</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>HSE_FREQ</name>
							<description>HSE clock freqency selection</description>
							<bitOffset>2</bitOffset>
							<bitWidth>2</bitWidth>
							<access>read-write</access>
						</field>
					</fields>
				</register>
				<register>
					<name>CIER</name>
					<displayName>CIER</displayName>
					<description>Clock interrupt enable
					register</description>
					<addressOffset>0x18</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>PLLRDYIE</name>
							<description>PLL ready interrupt enable</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSERDYIE</name>
							<description>HSE ready interrupt enable</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSIRDYIE</name>
							<description>HSI ready interrupt enable</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSERDYIE</name>
							<description>LSE ready interrupt enable</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSIRDYIE</name>
							<description>LSI ready interrupt enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CIFR</name>
					<displayName>CIFR</displayName>
					<description>Clock interrupt flag register</description>
					<addressOffset>0x1C</addressOffset>
					<size>0x20</size>
					<access>read-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LSECSSF</name>
							<description>LSE clock secure system interrupt flag</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CSSF</name>
							<description>HSE clock secure system interrupt flag</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PLLRDYF</name>
							<description>PLL ready interrupt flag</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSERDYF</name>
							<description>HSE ready interrupt flag</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSIRDYF</name>
							<description>HSI ready interrupt flag</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSERDYF</name>
							<description>LSE ready interrupt flag</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSIRDYF</name>
							<description>LSI ready interrupt flag</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CICR</name>
					<displayName>CICR</displayName>
					<description>Clock interrupt clear register</description>
					<addressOffset>0x20</addressOffset>
					<size>0x20</size>
					<access>write-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LSECSSC</name>
							<description>LSE clock secure system interrupt flag clear</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CSSC</name>
							<description>clock secure system interrupt flag clear</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PLLRDYC</name>
							<description>PLL ready interrupt clear</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSERDYC</name>
							<description>HSE ready interrupt clear</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HSIRDYC</name>
							<description>HSI ready interrupt clear</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSERDYC</name>
							<description>LSE ready interrupt clear</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSIRDYC</name>
							<description>LSI ready interrupt clear</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>IOPRSTR</name>
					<displayName>IOPRSTR</displayName>
					<description>GPIO reset register</description>
					<addressOffset>0x24</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>GPIOFRST</name>
							<description>I/O port F reset</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>GPIOBRST</name>
							<description>I/O port B reset</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>GPIOARST</name>
							<description>I/O port A reset</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>AHBRSTR</name>
					<displayName>AHBRSTR</displayName>
					<description>AHB peripheral reset register</description>
					<addressOffset>0x28</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>CRCRST</name>
							<description>CRC reset</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DMARST</name>
							<description>DMA reset</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>APBRSTR1</name>
					<displayName>APBRSTR1</displayName>
					<description>APB peripheral reset register
					1</description>
					<addressOffset>0x2C</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LPTIMRST</name>
							<description>Low Power Timer reset</description>
							<bitOffset>31</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PWRRST</name>
							<description>Power interface reset</description>
							<bitOffset>28</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DBGRST</name>
							<description>Debug support reset</description>
							<bitOffset>27</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>I2CRST</name>
							<description>I2C reset</description>
							<bitOffset>21</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>USART2RST</name>
							<description>USART2 reset</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SPI2RST</name>
							<description>SPI2 reset</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TIM3RST</name>
							<description>TIM3 timer reset</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>APBRSTR2</name>
					<displayName>APBRSTR2</displayName>
					<description>APB peripheral reset register
					2</description>
					<addressOffset>0x30</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LEDRST</name>
							<description>LED reset</description>
							<bitOffset>23</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>COMP2RST</name>
							<description>COMP2 reset</description>
							<bitOffset>22</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>COMP1RST</name>
							<description>COMP1 reset</description>
							<bitOffset>21</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ADCRST</name>
							<description>ADC reset</description>
							<bitOffset>20</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TIM17RST</name>
							<description>TIM17 timer reset</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TIM16RST</name>
							<description>TIM16 timer reset</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TIM14RST</name>
							<description>TIM14 timer reset</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>USART1RST</name>
							<description>USART1 reset</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SPI1RST</name>
							<description>SPI1 reset</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TIM1RST</name>
							<description>TIM1 timer reset</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SYSCFGRST</name>
							<description>SYSCFG and COMP
							reset</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>IOPENR</name>
					<displayName>IOPENR</displayName>
					<description>GPIO clock enable register</description>
					<addressOffset>0x34</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>GPIOFEN</name>
							<description>I/O port F clock enable</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>GPIOBEN</name>
							<description>I/O port B clock enable</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>GPIOAEN</name>
							<description>I/O port A clock enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>AHBENR</name>
					<displayName>AHBENR</displayName>
					<description>AHB peripheral clock enable
					register</description>
					<addressOffset>0x38</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>CRCEN</name>
							<description>CRC clock enable</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SRAMEN</name>
							<description>SRAM memory interface clock
							enable</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FLASHEN</name>
							<description>Flash memory interface clock
							enable</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DMAEN</name>
							<description>DMA clock enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>APBENR1</name>
					<displayName>APBENR1</displayName>
					<description>APB peripheral clock enable register
					1</description>
					<addressOffset>0x3C</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LPTIMEN</name>
							<description>LPTIM clock enable</description>
							<bitOffset>31</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PWREN</name>
							<description>Power interface clock
							enable</description>
							<bitOffset>28</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DBGEN</name>
							<description>Debug support clock enable</description>
							<bitOffset>27</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>I2CEN</name>
							<description>I2C clock enable</description>
							<bitOffset>21</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>USART2EN</name>
							<description>USART2 clock enable</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SPI2EN</name>
							<description>SPI2 clock enable</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>WWDGEN</name>
							<description>WWDG clock enable</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RTCAPBEN</name>
							<description>RTC APB clock enable</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TIM3EN</name>
							<description>TIM3 timer clock enable</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>APBENR2</name>
					<displayName>APBENR2</displayName>
					<description>APB peripheral clock enable register
					2</description>
					<addressOffset>0x40</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LEDEN</name>
							<description>LED clock enable</description>
							<bitOffset>23</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>COMP2EN</name>
							<description>COMP2 clock enable</description>
							<bitOffset>22</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>COMP1EN</name>
							<description>COMP1 clock enable</description>
							<bitOffset>21</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ADCEN</name>
							<description>ADC clock enable</description>
							<bitOffset>20</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TIM17EN</name>
							<description>TIM16 timer clock enable</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TIM16EN</name>
							<description>TIM16 timer clock enable</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TIM14EN</name>
							<description>TIM14 timer clock enable</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>USART1EN</name>
							<description>USART1 clock enable</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SPI1EN</name>
							<description>SPI1 clock enable</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TIM1EN</name>
							<description>TIM1 timer clock enable</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SYSCFGEN</name>
							<description>SYSCFG, COMP and VREFBUF clock
							enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CCIPR</name>
					<displayName>CCIPR</displayName>
					<description>Peripherals independent clock configuration
					register</description>
					<addressOffset>0x54</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LPTIM1SEL</name>
							<description>LPTIM1 clock source
							selection</description>
							<bitOffset>18</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>COMP2SEL</name>
							<description>COMP2 clock source
							selection</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>COMP1SEL</name>
							<description>COMP1 clock source
							selection</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PVDSEL</name>
							<description>PVD detect clock source
							selection</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>BDCR</name>
					<displayName>BDCR</displayName>
					<description>RTC domain control register</description>
					<addressOffset>0x5C</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LSCOSEL</name>
							<description>Low-speed clock output
							selection</description>
							<bitOffset>25</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSCOEN</name>
							<description>Low-speed clock output (LSCO)
							enable</description>
							<bitOffset>24</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BDRST</name>
							<description>RTC domain software reset</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RTCEN</name>
							<description>RTC clock source enable</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RTCSEL</name>
							<description>RTC clock source selection</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>LSECSSD</name>
							<description>LSE CSS detect</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>						
						<field>
							<name>LSECSSON</name>
							<description>LSE CSS enable</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSEBYP</name>
							<description>LSE oscillator bypass</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSERDY</name>
							<description>LSE oscillator ready</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSEON</name>
							<description>LSE oscillator enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CSR</name>
					<displayName>CSR</displayName>
					<description>Control/status register</description>
					<addressOffset>0x60</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>WWDGRSTF</name>
							<description>Window watchdog reset flag</description>
							<bitOffset>30</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IWDGRSTF</name>
							<description>Independent window watchdog reset
							flag</description>
							<bitOffset>29</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SFTRSTF</name>
							<description>Software reset flag</description>
							<bitOffset>28</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PWRRSTF</name>
							<description>BOR or POR/PDR flag</description>
							<bitOffset>27</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PINRSTF</name>
							<description>Pin reset flag</description>
							<bitOffset>26</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OBLRSTF</name>
							<description>Option byte loader reset
							flag</description>
							<bitOffset>25</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RMVF</name>
							<description>Remove reset flags</description>
							<bitOffset>23</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSIRDY</name>
							<description>LSI oscillator ready</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LSION</name>
							<description>LSI oscillator enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
			</registers>
		</peripheral>
		<peripheral>
			<name>PWR</name>
			<description>Power control</description>
			<groupName>PWR</groupName>
			<baseAddress>0x40007000</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<registers>
				<register>
					<name>CR1</name>
					<displayName>CR1</displayName>
					<description>Power control register 1</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00030000</resetValue>
					<fields>
						<field>
							<name>HSION_CTRL</name>
							<description>HSI open time control</description>
							<bitOffset>19</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SRAM_RETV</name>
							<description>SRAM retention voltage control</description>
							<bitOffset>16</bitOffset>
							<bitWidth>3</bitWidth>
						</field>
						<field>
							<name>LPR</name>
							<description>Low-power run</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FLS_SLPTIME</name>
							<description>Flash wait time after wakeup from the stop mode</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MRRDY_TIME</name>
							<description>Time selection wakeup from LP to VR</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>VOS</name>
							<description>Voltage scaling range
							selection</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DBP</name>
							<description>Disable backup domain write
							protection</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BIAS_CR_SEL</name>
							<description>MR Bias current selection</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BIAS_CR</name>
							<description>MR Bias current</description>
							<bitOffset>0</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CR2</name>
					<displayName>CR2</displayName>
					<description>Power control register 2</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000500</resetValue>
					<fields>
						<field>
							<name>FLT_TIME</name>
							<description>Digital filter time configuration</description>
							<bitOffset>9</bitOffset>
							<bitWidth>3</bitWidth>
						</field>
						<field>
							<name>FLTEN</name>
							<description>Digital filter enable </description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PVDT</name>
							<description>Power voltage detector  threshold
							selection</description>
							<bitOffset>4</bitOffset>
							<bitWidth>3</bitWidth>
						</field>
						<field>
							<name>SRCSEL</name>
							<description>Power voltage detector volatage
							selection</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PVDE</name>
							<description>Power voltage detector
							enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>SR</name>
					<displayName>SR</displayName>
					<description>Power status register </description>
					<addressOffset>0x14</addressOffset>
					<size>0x20</size>
					<access>read-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>PVDO</name>
							<description>PVD output</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
			</registers>
		</peripheral>
		<peripheral>
			<name>GPIOA</name>
			<description>General-purpose I/Os</description>
			<groupName>GPIO</groupName>
			<baseAddress>0x50000000</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<registers>
				<register>
					<name>MODER</name>
					<displayName>MODER</displayName>
					<description>GPIO port mode register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0xEBFFFFFF</resetValue>
					<fields>
						<field>
							<name>MODE15</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>30</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE14</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>28</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE13</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>26</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE12</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>24</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE11</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>22</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE10</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>20</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE9</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>18</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE8</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE7</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE6</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE5</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE4</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE3</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE2</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE1</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE0</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>OTYPER</name>
					<displayName>OTYPER</displayName>
					<description>GPIO port output type register</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>OT15</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT14</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT13</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT12</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT11</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT10</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT9</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT8</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT7</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT6</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT5</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT4</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT3</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT2</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT1</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT0</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>OSPEEDR</name>
					<displayName>OSPEEDR</displayName>
					<description>GPIO port output speed
					register</description>
					<addressOffset>0x8</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x0C000000</resetValue>
					<fields>
						<field>
							<name>OSPEED15</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>30</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED14</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>28</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED13</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>26</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED12</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>24</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED11</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>22</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED10</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>20</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED9</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>18</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED8</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED7</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED6</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED5</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED4</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED3</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED2</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED1</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED0</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>PUPDR</name>
					<displayName>PUPDR</displayName>
					<description>GPIO port pull-up/pull-down
					register</description>
					<addressOffset>0xC</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x24000000</resetValue>
					<fields>
						<field>
							<name>PUPD15</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>30</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD14</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>28</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD13</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>26</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD12</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>24</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD11</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>22</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD10</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>20</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD9</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>18</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD8</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD7</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD6</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD5</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD4</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD3</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD2</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD1</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD0</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>IDR</name>
					<displayName>IDR</displayName>
					<description>GPIO port input data register</description>
					<addressOffset>0x10</addressOffset>
					<size>0x20</size>
					<access>read-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>ID15</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID14</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID13</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID12</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID11</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID10</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID9</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID8</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID7</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID6</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID5</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID4</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID3</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID2</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID1</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID0</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>ODR</name>
					<displayName>ODR</displayName>
					<description>GPIO port output data register</description>
					<addressOffset>0x14</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>OD15</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD14</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD13</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD12</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD11</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD10</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD9</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD8</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD7</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD6</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD5</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD4</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD3</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD2</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD1</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD0</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>BSRR</name>
					<displayName>BSRR</displayName>
					<description>GPIO port bit set/reset
					register</description>
					<addressOffset>0x18</addressOffset>
					<size>0x20</size>
					<access>write-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>BR15</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>31</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR14</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>30</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR13</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>29</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR12</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>28</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR11</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>27</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR10</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>26</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR9</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>25</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR8</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>24</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR7</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>23</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR6</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>22</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR5</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>21</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR4</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>20</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR3</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>19</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR2</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR1</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR0</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS15</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS14</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS13</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS12</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS11</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS10</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS9</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS8</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS7</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS6</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS5</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS4</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS3</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS2</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS1</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS0</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>LCKR</name>
					<displayName>LCKR</displayName>
					<description>GPIO port configuration lock
					register</description>
					<addressOffset>0x1C</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LCKK</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK15</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK14</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK13</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK12</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK11</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK10</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK9</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK8</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK7</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK6</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK5</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK4</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK3</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK2</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK1</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK0</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>AFRL</name>
					<displayName>AFRL</displayName>
					<description>GPIO alternate function low
					register</description>
					<addressOffset>0x20</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>AFSEL7</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>28</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL6</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>24</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL5</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>20</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL4</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL3</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL2</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL1</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL0</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>AFRH</name>
					<displayName>AFRH</displayName>
					<description>GPIO alternate function high
					register</description>
					<addressOffset>0x24</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>AFSEL15</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>28</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL14</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>24</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL13</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>20</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL12</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL11</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL10</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL9</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL8</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>BRR</name>
					<displayName>BRR</displayName>
					<description>port bit reset register</description>
					<addressOffset>0x28</addressOffset>
					<size>0x20</size>
					<access>write-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>BR15</name>
							<description>Port Reset bit</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR14</name>
							<description>Port Reset bit</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR13</name>
							<description>Port Reset bit</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR12</name>
							<description>Port Reset bit</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR11</name>
							<description>Port Reset bit</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR10</name>
							<description>Port Reset bit</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR9</name>
							<description>Port Reset bit</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR8</name>
							<description>Port Reset bit</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR7</name>
							<description>Port Reset bit</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR6</name>
							<description>Port Reset bit</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR5</name>
							<description>Port Reset bit</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR4</name>
							<description>Port Reset bit</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR3</name>
							<description>Port Reset bit</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR2</name>
							<description>Port Reset bit</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR1</name>
							<description>Port Reset bit</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR0</name>
							<description>Port Reset bit</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
			</registers>
		</peripheral>
		<peripheral>
			<name>GPIOB</name>
			<description>General-purpose I/Os</description>
			<groupName>GPIO</groupName>
			<baseAddress>0x50000400</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<registers>
				<register>
					<name>MODER</name>
					<displayName>MODER</displayName>
					<description>GPIO port mode register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0xFFFFFFFF</resetValue>
					<fields>
						<field>
							<name>MODE8</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE7</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE6</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE5</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE4</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE3</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE2</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE1</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MODE0</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>OTYPER</name>
					<displayName>OTYPER</displayName>
					<description>GPIO port output type register</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>OT8</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT7</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT6</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT5</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT4</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT3</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT2</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT1</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OT0</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>OSPEEDR</name>
					<displayName>OSPEEDR</displayName>
					<description>GPIO port output speed
					register</description>
					<addressOffset>0x8</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>OSPEED8</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED7</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED6</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED5</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED4</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED3</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED2</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED1</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>OSPEED0</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>PUPDR</name>
					<displayName>PUPDR</displayName>
					<description>GPIO port pull-up/pull-down
					register</description>
					<addressOffset>0xC</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>PUPD8</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD7</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>14</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD6</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD5</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD4</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD3</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD2</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD1</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PUPD0</name>
							<description>Port x configuration bits (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>IDR</name>
					<displayName>IDR</displayName>
					<description>GPIO port input data register</description>
					<addressOffset>0x10</addressOffset>
					<size>0x20</size>
					<access>read-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>ID8</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID7</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID6</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID5</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID4</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID3</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID2</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID1</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ID0</name>
							<description>Port input data (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>ODR</name>
					<displayName>ODR</displayName>
					<description>GPIO port output data register</description>
					<addressOffset>0x14</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>OD8</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD7</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD6</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD5</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD4</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD3</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD2</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD1</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OD0</name>
							<description>Port output data (y =
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>BSRR</name>
					<displayName>BSRR</displayName>
					<description>GPIO port bit set/reset
					register</description>
					<addressOffset>0x18</addressOffset>
					<size>0x20</size>
					<access>write-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>BR8</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>24</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR7</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>23</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR6</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>22</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR5</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>21</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR4</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>20</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR3</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>19</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR2</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR1</name>
							<description>Port x reset bit y (y =
							0..15)</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR0</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS8</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS7</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS6</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS5</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS4</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS3</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS2</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS1</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BS0</name>
							<description>Port x set bit y (y=
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>LCKR</name>
					<displayName>LCKR</displayName>
					<description>GPIO port configuration lock
					register</description>
					<addressOffset>0x1C</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>LCKK</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK8</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK7</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK6</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK5</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK4</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK3</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK2</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK1</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LCK0</name>
							<description>Port x lock bit y (y=
							0..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>AFRL</name>
					<displayName>AFRL</displayName>
					<description>GPIO alternate function low
					register</description>
					<addressOffset>0x20</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>AFSEL7</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>28</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL6</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>24</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL5</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>20</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL4</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL3</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL2</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL1</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL0</name>
							<description>Alternate function selection for port x
							bit y (y = 0..7)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>AFRH</name>
					<displayName>AFRH</displayName>
					<description>GPIO alternate function high
					register</description>
					<addressOffset>0x24</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>AFSEL15</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>28</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL14</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>24</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL13</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>20</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL12</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>16</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL11</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>12</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL10</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL9</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>4</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
						<field>
							<name>AFSEL8</name>
							<description>Alternate function selection for port x
							bit y (y = 8..15)</description>
							<bitOffset>0</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>BRR</name>
					<displayName>BRR</displayName>
					<description>port bit reset register</description>
					<addressOffset>0x28</addressOffset>
					<size>0x20</size>
					<access>write-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>BR8</name>
							<description>Port Reset bit</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR7</name>
							<description>Port Reset bit</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR6</name>
							<description>Port Reset bit</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR5</name>
							<description>Port Reset bit</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR4</name>
							<description>Port Reset bit</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR3</name>
							<description>Port Reset bit</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR2</name>
							<description>Port Reset bit</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR1</name>
							<description>Port Reset bit</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BR0</name>
							<description>Port Reset bit</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
			</registers>
		</peripheral>
		<peripheral derivedFrom="GPIOB">
			<name>GPIOF</name>
			<baseAddress>0x50001400</baseAddress>
		</peripheral>
		<peripheral>
			<name>EXTI</name>
			<description>External interrupt/event
			controller</description>
			<groupName>EXTI</groupName>
			<baseAddress>0x40021800</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<interrupt>
				<name>PVD</name>
				<description>PVD Interrupt through EXTI Lines 16</description>
				<value>1</value>
			</interrupt>
			<interrupt>
				<name>EXTI0_1</name>
				<description>EXTI Line 0 and 1 Interrupt</description>
				<value>5</value>
			</interrupt>
			<interrupt>
				<name>EXTI2_3</name>
				<description>EXTI Line 2 and 3 Interrupt</description>
				<value>6</value>
			</interrupt>
			<interrupt>
				<name>EXTI4_15</name>
				<description>EXTI Line 4 to 15 Interrupt</description>
				<value>7</value>
			</interrupt>
			<registers>
				<register>
					<name>RTSR</name>
					<displayName>RTSR</displayName>
					<description>EXTI rising trigger selection
					register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>RT18</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT17</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT16</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT15</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT14</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT13</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT12</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT11</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT10</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT9</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT8</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT7</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT6</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT5</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT4</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT3</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT2</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT1</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RT0</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>FTSR</name>
					<displayName>FTSR</displayName>
					<description>EXTI falling trigger selection
					register</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>FT18</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT17</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT16</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT15</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT14</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT13</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT12</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT11</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT10</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT9</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT8</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT7</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT6</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT5</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT4</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT3</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT2</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT1</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>FT0</name>
							<description>Falling trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>SWIER</name>
					<displayName>SWIER</displayName>
					<description>EXTI software interrupt event
					register</description>
					<addressOffset>0x8</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>SWI18</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI17</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI16</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI15</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI14</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI13</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI12</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI11</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI10</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI9</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI8</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI7</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI6</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI5</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI4</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI3</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI2</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI1</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SWI0</name>
							<description>Rising trigger event configuration bit
							of Configurable Event input</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>PR</name>
					<displayName>PR</displayName>
					<description>EXTI  pending
					register</description>
					<addressOffset>0xC</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>PR18</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR17</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR16</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR15</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR14</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR13</name>
							<description>configurable event inputs x rising edge
							Pending bit</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR12</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR11</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR10</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR9</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR8</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR7</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR6</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR5</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR4</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR3</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR2</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR1</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PR0</name>
							<description>configurable event inputs x rising edge
							Pending bit.</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>EXTICR1</name>
					<displayName>EXTICR1</displayName>
					<description>EXTI external interrupt selection
					register</description>
					<addressOffset>0x60</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>EXTI3</name>
							<description>GPIO port selection</description>
							<bitOffset>24</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>EXTI2</name>
							<description>GPIO port selection</description>
							<bitOffset>16</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>EXTI1</name>
							<description>GPIO port selection</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>EXTI0</name>
							<description>GPIO port selection</description>
							<bitOffset>0</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>EXTICR2</name>
					<displayName>EXTICR2</displayName>
					<description>EXTI external interrupt selection
					register</description>
					<addressOffset>0x64</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>EXTI7</name>
							<description>GPIO port selection</description>
							<bitOffset>24</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EXTI6</name>
							<description>GPIO port selection</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EXTI5</name>
							<description>GPIO port selection</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EXTI4</name>
							<description>GPIO port selection</description>
							<bitOffset>0</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>EXTICR3</name>
					<displayName>EXTICR3</displayName>
					<description>EXTI external interrupt selection
					register</description>
					<addressOffset>0x68</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>EXTI8</name>
							<description>GPIO port selection</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>IMR</name>
					<displayName>IMR</displayName>
					<description>EXTI CPU wakeup with interrupt mask
					register</description>
					<addressOffset>0x80</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0xFFF80000</resetValue>
					<fields>
						<field>
							<name>IM29</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>29</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM19</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>19</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM18</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM17</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM16</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM15</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM14</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM13</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM12</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM11</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM10</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM9</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM8</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM7</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM6</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM5</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM4</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM3</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM2</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM1</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IM0</name>
							<description>CPU wakeup with interrupt mask on event
							input</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>EMR</name>
					<displayName>EMR</displayName>
					<description>EXTI CPU wakeup with event mask
					register</description>
					<addressOffset>0x84</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>EM29</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>29</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM19</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>19</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM18</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>18</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM17</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM16</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM15</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM14</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM13</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM12</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM11</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM10</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM9</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM8</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM7</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM6</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM5</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM4</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM3</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM2</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM1</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EM0</name>
							<description>CPU wakeup with event mask on event
							input</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
			</registers>
		</peripheral>
		<peripheral>
			<name>LPTIM</name>
			<description>Low power timer</description>
			<groupName>LPTIM</groupName>
			<baseAddress>0x40007C00</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<registers>
				<register>
					<name>ISR</name>
					<displayName>ISR</displayName>
					<description>Interrupt and Status Register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>ARRM</name>
							<description>Autoreload match</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>ICR</name>
					<displayName>ICR</displayName>
					<description>Interrupt Clear Register</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>write-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>ARRMCF</name>
							<description>Autoreload match Clear
							Flag</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>IER</name>
					<displayName>IER</displayName>
					<description>Interrupt Enable Register</description>
					<addressOffset>0x8</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>ARRMIE</name>
							<description>Autoreload match Interrupt
							Enable</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CFGR</name>
					<displayName>CFGR</displayName>
					<description>Configuration Register</description>
					<addressOffset>0xC</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>PRELOAD</name>
							<description>Registers update mode</description>
							<bitOffset>22</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PRESC</name>
							<description>Clock prescaler</description>
							<bitOffset>9</bitOffset>
							<bitWidth>3</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CR</name>
					<displayName>CR</displayName>
					<description>Control Register</description>
					<addressOffset>0x10</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>RSTARE</name>
							<description>Reset after read enable</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SNGSTRT</name>
							<description>LPTIM start in single mode</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ENABLE</name>
							<description>LPTIM Enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>ARR</name>
					<displayName>ARR</displayName>
					<description>Autoreload Register</description>
					<addressOffset>0x18</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000001</resetValue>
					<fields>
						<field>
							<name>ARR</name>
							<description>Auto reload value</description>
							<bitOffset>0</bitOffset>
							<bitWidth>16</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CNT</name>
					<displayName>CNT</displayName>
					<description>Counter Register</description>
					<addressOffset>0x1C</addressOffset>
					<size>0x20</size>
					<access>read-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>CNT</name>
							<description>Counter value</description>
							<bitOffset>0</bitOffset>
							<bitWidth>16</bitWidth>
						</field>
					</fields>
				</register>
			</registers>
		</peripheral>
		<peripheral>
			<name>USART1</name>
			<description>Universal synchronous asynchronous receiver
			transmitter</description>
			<groupName>USART</groupName>
			<baseAddress>0x40013800</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<interrupt>
				<name>USART1</name>
				<description>USART1 global Interrupt</description>
				<value>27</value>
			</interrupt>
			<registers>
				<register>
					<name>SR</name>
					<displayName>SR</displayName>
					<description>Status register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<resetValue>0x00C0</resetValue>
					<fields>
						<field>
							<name>ABRRQ</name>
							<description>Automate baudrate detection requeset</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
							<access>write-only</access>
						</field>
						<field>
							<name>ABRE</name>
							<description>Automate baudrate detection error flag</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-only</access>
						</field>
						<field>
							<name>ABRF</name>
							<description>Automate baudrate detection flag</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-only</access>
						</field>
						<field>
							<name>CTS</name>
							<description>CTS flag</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>TXE</name>
							<description>Transmit data register
							empty</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-only</access>
						</field>
						<field>
							<name>TC</name>
							<description>Transmission complete</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>RXNE</name>
							<description>Read data register not
							empty</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-write</access>
						</field>
						<field>
							<name>IDLE</name>
							<description>IDLE line detected</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-only</access>
						</field>
						<field>
							<name>ORE</name>
							<description>Overrun error</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-only</access>
						</field>
						<field>
							<name>NE</name>
							<description>Noise error flag</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-only</access>
						</field>
						<field>
							<name>FE</name>
							<description>Framing error</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-only</access>
						</field>
						<field>
							<name>PE</name>
							<description>Parity error</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
							<access>read-only</access>
						</field>
					</fields>
				</register>
				<register>
					<name>DR</name>
					<displayName>DR</displayName>
					<description>Data register</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>DR</name>
							<description>Data value</description>
							<bitOffset>0</bitOffset>
							<bitWidth>9</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>BRR</name>
					<displayName>BRR</displayName>
					<description>Baud rate register</description>
					<addressOffset>0x8</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x0000</resetValue>
					<fields>
						<field>
							<name>DIV_Mantissa</name>
							<description>mantissa of USARTDIV</description>
							<bitOffset>4</bitOffset>
							<bitWidth>12</bitWidth>
						</field>
						<field>
							<name>DIV_Fraction</name>
							<description>fraction of USARTDIV</description>
							<bitOffset>0</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CR1</name>
					<displayName>CR1</displayName>
					<description>Control register 1</description>
					<addressOffset>0xC</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x0000</resetValue>
					<fields>
						<field>
							<name>UE</name>
							<description>USART enable</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>M</name>
							<description>Word length</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>WAKE</name>
							<description>Wakeup method</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PCE</name>
							<description>Parity control enable</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PS</name>
							<description>Parity selection</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PEIE</name>
							<description>PE interrupt enable</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TXEIE</name>
							<description>TXE interrupt enable</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TCIE</name>
							<description>Transmission complete interrupt
							enable</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RXNEIE</name>
							<description>RXNE interrupt enable</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IDLEIE</name>
							<description>IDLE interrupt enable</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TE</name>
							<description>Transmitter enable</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RE</name>
							<description>Receiver enable</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RWU</name>
							<description>Receiver wakeup</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SBK</name>
							<description>Send break</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CR2</name>
					<displayName>CR2</displayName>
					<description>Control register 2</description>
					<addressOffset>0x10</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x0000</resetValue>
					<fields>
						<field>
							<name>STOP</name>
							<description>STOP bits</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>CLKEN</name>
							<description>Clock enable</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CPOL</name>
							<description>Clock polarity</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CPHA</name>
							<description>Clock phase</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>LBCL</name>
							<description>Last bit clock pulse</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ADD</name>
							<description>Address of the USART node</description>
							<bitOffset>0</bitOffset>
							<bitWidth>4</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CR3</name>
					<displayName>CR3</displayName>
					<description>Control register 3</description>
					<addressOffset>0x14</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x0000</resetValue>
					<fields>
						<field>
							<name>ABRMOD</name>
							<description>Auto baudrate mode</description>
							<bitOffset>13</bitOffset>
							<bitWidth>2</bitWidth>
						</field>						
						<field>
							<name>ABREN</name>
							<description>Auto baudrate enable</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OVER8</name>
							<description>Oversampling mode</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>						
						<field>
							<name>CTSIE</name>
							<description>CTS interrupt enable</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CTSE</name>
							<description>CTS enable</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RTSE</name>
							<description>RTS enable</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DMAT</name>
							<description>DMA enable transmitter</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DMAR</name>
							<description>DMA enable receiver</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HDSEL</name>
							<description>Half-duplex selection</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IRLP</name>
							<description>IrDA low-power</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IREN</name>
							<description>IrDA mode enable</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EIE</name>
							<description>Error interrupt enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
			</registers>
		</peripheral>
		<peripheral derivedFrom="USART1">
			<name>USART2</name>
			<baseAddress>0x40004400</baseAddress>
			<interrupt>
				<name>USART2</name>
				<description>USART2 global Interrupt</description>
				<value>28</value>
			</interrupt>
		</peripheral>
		<peripheral>
			<name>RTC</name>
			<description>Real time clock</description>
			<groupName>RTC</groupName>
			<baseAddress>0x40002800</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<interrupt>
				<name>RTC</name>
				<description>RTC Interrupt through EXTI Lines 19</description>
				<value>2</value>
			</interrupt>
			<registers>
				<register>
				  <name>CRH</name>
				  <displayName>CRH</displayName>
				  <description>RTC Control Register High</description>
				  <addressOffset>0x0</addressOffset>
				  <size>0x20</size>
				  <access>read-write</access>
				  <resetValue>0x00000000</resetValue>
				  <fields>
					<field>
					  <name>OWIE</name>
					  <description>Overflow interrupt Enable</description>
					  <bitOffset>2</bitOffset>
					  <bitWidth>1</bitWidth>
					</field>
					<field>
					  <name>ALRIE</name>
					  <description>Alarm interrupt Enable</description>
					  <bitOffset>1</bitOffset>
					  <bitWidth>1</bitWidth>
					</field>
					<field>
					  <name>SECIE</name>
					  <description>Second interrupt Enable</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>1</bitWidth>
					</field>
				  </fields>
				</register>
				<register>
				  <name>CRL</name>
				  <displayName>CRL</displayName>
				  <description>RTC Control Register Low</description>
				  <addressOffset>0x4</addressOffset>
				  <size>0x20</size>
				  <resetValue>0x00000020</resetValue>
				  <fields>
					<field>
					  <name>RTOFF</name>
					  <description>RTC operation OFF</description>
					  <bitOffset>5</bitOffset>
					  <bitWidth>1</bitWidth>
					  <access>read-only</access>
					</field>
					<field>
					  <name>CNF</name>
					  <description>Configuration Flag</description>
					  <bitOffset>4</bitOffset>
					  <bitWidth>1</bitWidth>
					  <access>read-write</access>
					</field>
					<field>
					  <name>RSF</name>
					  <description>Registers Synchronized
					  Flag</description>
					  <bitOffset>3</bitOffset>
					  <bitWidth>1</bitWidth>
					  <access>read-write</access>
					</field>
					<field>
					  <name>OWF</name>
					  <description>Overflow Flag</description>
					  <bitOffset>2</bitOffset>
					  <bitWidth>1</bitWidth>
					  <access>read-write</access>
					</field>
					<field>
					  <name>ALRF</name>
					  <description>Alarm Flag</description>
					  <bitOffset>1</bitOffset>
					  <bitWidth>1</bitWidth>
					  <access>read-write</access>
					</field>
					<field>
					  <name>SECF</name>
					  <description>Second Flag</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>1</bitWidth>
					  <access>read-write</access>
					</field>
				  </fields>
				</register>
				<register>
				  <name>PRLH</name>
				  <displayName>PRLH</displayName>
				  <description>RTC Prescaler Load Register
				  High</description>
				  <addressOffset>0x8</addressOffset>
				  <size>0x20</size>
				  <access>write-only</access>
				  <resetValue>0x00000000</resetValue>
				  <fields>
					<field>
					  <name>PRLH</name>
					  <description>RTC Prescaler Load Register
					  High</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>4</bitWidth>
					</field>
				  </fields>
				</register>
				<register>
				  <name>PRLL</name>
				  <displayName>PRLL</displayName>
				  <description>RTC Prescaler Load Register
				  Low</description>
				  <addressOffset>0xC</addressOffset>
				  <size>0x20</size>
				  <access>write-only</access>
				  <resetValue>0x8000</resetValue>
				  <fields>
					<field>
					  <name>PRLL</name>
					  <description>RTC Prescaler Divider Register
					  Low</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>16</bitWidth>
					</field>
				  </fields>
				</register>
				<register>
				  <name>DIVH</name>
				  <displayName>DIVH</displayName>
				  <description>RTC Prescaler Divider Register
				  High</description>
				  <addressOffset>0x10</addressOffset>
				  <size>0x20</size>
				  <access>read-only</access>
				  <resetValue>0x00000000</resetValue>
				  <fields>
					<field>
					  <name>DIVH</name>
					  <description>RTC prescaler divider register
					  high</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>4</bitWidth>
					</field>
				  </fields>
				</register>
				<register>
				  <name>DIVL</name>
				  <displayName>DIVL</displayName>
				  <description>RTC Prescaler Divider Register
				  Low</description>
				  <addressOffset>0x14</addressOffset>
				  <size>0x20</size>
				  <access>read-only</access>
				  <resetValue>0x8000</resetValue>
				  <fields>
					<field>
					  <name>DIVL</name>
					  <description>RTC prescaler divider register
					  Low</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>16</bitWidth>
					</field>
				  </fields>
				</register>
				<register>
				  <name>CNTH</name>
				  <displayName>CNTH</displayName>
				  <description>RTC Counter Register High</description>
				  <addressOffset>0x18</addressOffset>
				  <size>0x20</size>
				  <access>read-write</access>
				  <resetValue>0x00000000</resetValue>
				  <fields>
					<field>
					  <name>CNTH</name>
					  <description>RTC counter register high</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>16</bitWidth>
					</field>
				  </fields>
				</register>
				<register>
				  <name>CNTL</name>
				  <displayName>CNTL</displayName>
				  <description>RTC Counter Register Low</description>
				  <addressOffset>0x1C</addressOffset>
				  <size>0x20</size>
				  <access>read-write</access>
				  <resetValue>0x00000000</resetValue>
				  <fields>
					<field>
					  <name>CNTL</name>
					  <description>RTC counter register Low</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>16</bitWidth>
					</field>
				  </fields>
				</register>
				<register>
				  <name>ALRH</name>
				  <displayName>ALRH</displayName>
				  <description>RTC Alarm Register High</description>
				  <addressOffset>0x20</addressOffset>
				  <size>0x20</size>
				  <access>write-only</access>
				  <resetValue>0xFFFF</resetValue>
				  <fields>
					<field>
					  <name>ALRH</name>
					  <description>RTC alarm register high</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>16</bitWidth>
					</field>
				  </fields>
				</register>
				<register>
				  <name>ALRL</name>
				  <displayName>ALRL</displayName>
				  <description>RTC Alarm Register Low</description>
				  <addressOffset>0x24</addressOffset>
				  <size>0x20</size>
				  <access>write-only</access>
				  <resetValue>0xFFFF</resetValue>
				  <fields>
					<field>
					  <name>ALRL</name>
					  <description>RTC alarm register low</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>16</bitWidth>
					</field>
				  </fields>
				</register>
				<register>
				  <name>RTCCR</name>
				  <displayName>RTCCR</displayName>
				  <description>RTC clock calibration</description>
				  <addressOffset>0x2C</addressOffset>
				  <size>0x20</size>
				  <access>read-write</access>
				  <resetValue>0x0000</resetValue>
				  <fields>
					<field>
					  <name>ASOS</name>
					  <description>Alarm or second output selection</description>
					  <bitOffset>9</bitOffset>
					  <bitWidth>1</bitWidth>
					</field>
					<field>
					  <name>ASOE</name>
					  <description>Alarm or second output enable</description>
					  <bitOffset>8</bitOffset>
					  <bitWidth>1</bitWidth>
					</field>
					<field>
					  <name>CCO</name>
					  <description>Calibration clock output</description>
					  <bitOffset>7</bitOffset>
					  <bitWidth>1</bitWidth>
					</field>
					<field>
					  <name>CAL</name>
					  <description>Calibration value</description>
					  <bitOffset>0</bitOffset>
					  <bitWidth>7</bitWidth>
					</field>                 
				  </fields>
				</register>
			</registers>
		</peripheral>
		<peripheral>
				<name>IWDG</name>
				<description>Independent watchdog</description>
				<groupName>IWDG</groupName>
				<baseAddress>0x40003000</baseAddress>
				<addressBlock>
					<offset>0x0</offset>
					<size>0x400</size>
					<usage>registers</usage>
				</addressBlock>
				<registers>
					<register>
						<name>KR</name>
						<displayName>KR</displayName>
						<description>Key register (IWDG_KR)</description>
						<addressOffset>0x0</addressOffset>
						<size>0x20</size>
						<access>write-only</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>KEY</name>
								<description>Key value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>PR</name>
						<displayName>PR</displayName>
						<description>Prescaler register (IWDG_PR)</description>
						<addressOffset>0x4</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>PR</name>
								<description>Prescaler divider</description>
								<bitOffset>0</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>RLR</name>
						<displayName>RLR</displayName>
						<description>Reload register (IWDG_RLR)</description>
						<addressOffset>0x8</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000FFF</resetValue>
						<fields>
							<field>
								<name>RL</name>
								<description>Watchdog counter reload
								value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>12</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>SR</name>
						<displayName>SR</displayName>
						<description>Status register (IWDG_SR)</description>
						<addressOffset>0xC</addressOffset>
						<size>0x20</size>
						<access>read-only</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>WVU</name>
								<description>Watchdog counter window value update</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>RVU</name>
								<description>Watchdog counter reload value
								update</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>PVU</name>
								<description>Watchdog prescaler value
								update</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>WINR</name>
						<displayName>WINR</displayName>
						<description>Window register (IWDG_SR)</description>
						<addressOffset>0x10</addressOffset>
						<size>0x20</size>
						<access>read-only</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>WIN</name>
								<description>window counter</description>
								<bitOffset>0</bitOffset>
								<bitWidth>12</bitWidth>
							</field>
						</fields>
					</register>			
				</registers>
		</peripheral>
		<peripheral>
				<name>WWDG</name>
				<description>Window watchdog</description>
				<groupName>WWDG</groupName>
				<baseAddress>0x40002C00</baseAddress>
				<addressBlock>
					<offset>0x0</offset>
					<size>0x400</size>
					<usage>registers</usage>
				</addressBlock>
				<interrupt>
					<name>WWDG</name>
					<description>Window WatchDog Interrupt</description>
					<value>0</value>
				</interrupt>
				<registers>
					<register>
						<name>CR</name>
						<displayName>CR</displayName>
						<description>Control register (WWDG_CR)</description>
						<addressOffset>0x0</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000007F</resetValue>
						<fields>
							<field>
								<name>WDGA</name>
								<description>Activation bit</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>T</name>
								<description>7-bit counter (MSB to LSB)</description>
								<bitOffset>0</bitOffset>
								<bitWidth>7</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CFR</name>
						<displayName>CFR</displayName>
						<description>Configuration register
						(WWDG_CFR)</description>
						<addressOffset>0x4</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000007F</resetValue>
						<fields>
							<field>
								<name>EWI</name>
								<description>Early Wakeup Interrupt</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>WDGTB</name>
								<description>Timer Base</description>
								<bitOffset>7</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>W</name>
								<description>7-bit window value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>7</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>SR</name>
						<displayName>SR</displayName>
						<description>Status register (WWDG_SR)</description>
						<addressOffset>0x8</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>EWIF</name>
								<description>Early Wakeup Interrupt flag</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
				</registers>
		</peripheral>
		<peripheral>
				<name>TIM1</name>
				<description>Advanced timer</description>
				<groupName>TIM</groupName>
				<baseAddress>0x40012C00</baseAddress>
				<addressBlock>
					<offset>0x0</offset>
					<size>0x400</size>
					<usage>registers</usage>
				</addressBlock>
				<interrupt>
					<name>TIM1_BRK_UP_TRG_COM</name>
					<description>TIM1 Break, Update, Trigger and Commutation Interrupt</description>
					<value>13</value>
				</interrupt>
				<interrupt>
					<name>TIM1_CC</name>
					<description>TIM1 Capture Compare Interrupt</description>
					<value>14</value>
				</interrupt>
				<registers>
					<register>
						<name>CR1</name>
						<displayName>CR1</displayName>
						<description>control register 1</description>
						<addressOffset>0x0</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CKD</name>
								<description>Clock division</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>ARPE</name>
								<description>Auto-reload preload enable</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CMS</name>
								<description>Center-aligned mode
								selection</description>
								<bitOffset>5</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>DIR</name>
								<description>Direction</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OPM</name>
								<description>One-pulse mode</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>URS</name>
								<description>Update request source</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UDIS</name>
								<description>Update disable</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CEN</name>
								<description>Counter enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CR2</name>
						<displayName>CR2</displayName>
						<description>control register 2</description>
						<addressOffset>0x4</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>OIS4</name>
								<description>Output Idle state 4</description>
								<bitOffset>14</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OIS3N</name>
								<description>Output Idle state 3</description>
								<bitOffset>13</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OIS3</name>
								<description>Output Idle state 3</description>
								<bitOffset>12</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OIS2N</name>
								<description>Output Idle state 2</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OIS2</name>
								<description>Output Idle state 2</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OIS1N</name>
								<description>Output Idle state 1</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OIS1</name>
								<description>Output Idle state 1</description>
								<bitOffset>8</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TI1S</name>
								<description>TI1 selection</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>MMS</name>
								<description>Master mode selection</description>
								<bitOffset>4</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>CCDS</name>
								<description>Capture/compare DMA
								selection</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CCUS</name>
								<description>Capture/compare control update
								selection</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CCPC</name>
								<description>Capture/compare preloaded
								control</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>SMCR</name>
						<displayName>SMCR</displayName>
						<description>slave mode control register</description>
						<addressOffset>0x8</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>ETP</name>
								<description>External trigger polarity</description>
								<bitOffset>15</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>ECE</name>
								<description>External clock enable</description>
								<bitOffset>14</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>ETPS</name>
								<description>External trigger prescaler</description>
								<bitOffset>12</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>ETF</name>
								<description>External trigger filter</description>
								<bitOffset>8</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>MSM</name>
								<description>Master/Slave mode</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TS</name>
								<description>Trigger selection</description>
								<bitOffset>4</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OCCS</name>
								<description>OCREF clear selection bit</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>SMS</name>
								<description>Slave mode selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>DIER</name>
						<displayName>DIER</displayName>
						<description>DMA/Interrupt enable register</description>
						<addressOffset>0xC</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>TDE</name>
								<description>Trigger DMA request enable</description>
								<bitOffset>14</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMDE</name>
								<description>COM DMA request enable</description>
								<bitOffset>13</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4DE</name>
								<description>Capture/Compare 4 DMA request
								enable</description>
								<bitOffset>12</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3DE</name>
								<description>Capture/Compare 3 DMA request
								enable</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2DE</name>
								<description>Capture/Compare 2 DMA request
								enable</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1DE</name>
								<description>Capture/Compare 1 DMA request
								enable</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UDE</name>
								<description>Update DMA request enable</description>
								<bitOffset>8</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>BIE</name>
								<description>Break interrupt enable</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TIE</name>
								<description>Trigger interrupt enable</description>
								<bitOffset>6</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMIE</name>
								<description>COM interrupt enable</description>
								<bitOffset>5</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4IE</name>
								<description>Capture/Compare 4 interrupt
								enable</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3IE</name>
								<description>Capture/Compare 3 interrupt
								enable</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2IE</name>
								<description>Capture/Compare 2 interrupt
								enable</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1IE</name>
								<description>Capture/Compare 1 interrupt
								enable</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UIE</name>
								<description>Update interrupt enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>SR</name>
						<displayName>SR</displayName>
						<description>status register</description>
						<addressOffset>0x10</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CC4OF</name>
								<description>Capture/Compare 4 overcapture
								flag</description>
								<bitOffset>12</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3OF</name>
								<description>Capture/Compare 3 overcapture
								flag</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2OF</name>
								<description>Capture/compare 2 overcapture
								flag</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1OF</name>
								<description>Capture/Compare 1 overcapture
								flag</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>BIF</name>
								<description>Break interrupt flag</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TIF</name>
								<description>Trigger interrupt flag</description>
								<bitOffset>6</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMIF</name>
								<description>COM interrupt flag</description>
								<bitOffset>5</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4IF</name>
								<description>Capture/Compare 4 interrupt
								flag</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3IF</name>
								<description>Capture/Compare 3 interrupt
								flag</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2IF</name>
								<description>Capture/Compare 2 interrupt
								flag</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1IF</name>
								<description>Capture/compare 1 interrupt
								flag</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UIF</name>
								<description>Update interrupt flag</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>EGR</name>
						<displayName>EGR</displayName>
						<description>event generation register</description>
						<addressOffset>0x14</addressOffset>
						<size>0x20</size>
						<access>write-only</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>BG</name>
								<description>Break generation</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TG</name>
								<description>Trigger generation</description>
								<bitOffset>6</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMG</name>
								<description>Capture/Compare control update
								generation</description>
								<bitOffset>5</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4G</name>
								<description>Capture/compare 4
								generation</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3G</name>
								<description>Capture/compare 3
								generation</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2G</name>
								<description>Capture/compare 2
								generation</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1G</name>
								<description>Capture/compare 1
								generation</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UG</name>
								<description>Update generation</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR1_Output</name>
						<displayName>CCMR1_Output</displayName>
						<description>capture/compare mode register (output
						mode)</description>
						<addressOffset>0x18</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>OC2CE</name>
								<description>Output Compare 2 clear
								enable</description>
								<bitOffset>15</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC2M</name>
								<description>Output Compare 2 mode</description>
								<bitOffset>12</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OC2PE</name>
								<description>Output Compare 2 preload
								enable</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC2FE</name>
								<description>Output Compare 2 fast
								enable</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2S</name>
								<description>Capture/Compare 2
								selection</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>OC1CE</name>
								<description>Output Compare 1 clear
								enable</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC1M</name>
								<description>Output Compare 1 mode</description>
								<bitOffset>4</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OC1PE</name>
								<description>Output Compare 1 preload
								enable</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC1FE</name>
								<description>Output Compare 1 fast
								enable</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1S</name>
								<description>Capture/Compare 1
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR1_Input</name>
						<displayName>CCMR1_Input</displayName>
						<description>capture/compare mode register 1 (input
						mode)</description>
						<alternateRegister>CCMR1_Output</alternateRegister>
						<addressOffset>0x18</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>IC2F</name>
								<description>Input capture 2 filter</description>
								<bitOffset>12</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>IC2PSC</name>
								<description>Input capture 2 prescaler</description>
								<bitOffset>10</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>CC2S</name>
								<description>Capture/Compare 2
								selection</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>IC1F</name>
								<description>Input capture 1 filter</description>
								<bitOffset>4</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>ICPSC</name>
								<description>Input capture 1 prescaler</description>
								<bitOffset>2</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>CC1S</name>
								<description>Capture/Compare 1
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR2_Output</name>
						<displayName>CCMR2_Output</displayName>
						<description>capture/compare mode register (output
						mode)</description>
						<addressOffset>0x1C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>OC4CE</name>
								<description>Output compare 4 clear
								enable</description>
								<bitOffset>15</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC4M</name>
								<description>Output compare 4 mode</description>
								<bitOffset>12</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OC4PE</name>
								<description>Output compare 4 preload
								enable</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC4FE</name>
								<description>Output compare 4 fast
								enable</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4S</name>
								<description>Capture/Compare 4
								selection</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>OC3CE</name>
								<description>Output compare 3 clear
								enable</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC3M</name>
								<description>Output compare 3 mode</description>
								<bitOffset>4</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OC3PE</name>
								<description>Output compare 3 preload
								enable</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC3FE</name>
								<description>Output compare 3 fast
								enable</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3S</name>
								<description>Capture/Compare 3
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR2_Input</name>
						<displayName>CCMR2_Input</displayName>
						<description>capture/compare mode register 2 (input
						mode)</description>
						<alternateRegister>CCMR2_Output</alternateRegister>
						<addressOffset>0x1C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>IC4F</name>
								<description>Input capture 4 filter</description>
								<bitOffset>12</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>IC4PSC</name>
								<description>Input capture 4 prescaler</description>
								<bitOffset>10</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>CC4S</name>
								<description>Capture/Compare 4
								selection</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>IC3F</name>
								<description>Input capture 3 filter</description>
								<bitOffset>4</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>IC3PSC</name>
								<description>Input capture 3 prescaler</description>
								<bitOffset>2</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>CC3S</name>
								<description>Capture/compare 3
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCER</name>
						<displayName>CCER</displayName>
						<description>capture/compare enable
						register</description>
						<addressOffset>0x20</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CC4P</name>
								<description>Capture/Compare 3 output
								Polarity</description>
								<bitOffset>13</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4E</name>
								<description>Capture/Compare 4 output
								enable</description>
								<bitOffset>12</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3NP</name>
								<description>Capture/Compare 3 output
								Polarity</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3NE</name>
								<description>Capture/Compare 3 complementary output
								enable</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3P</name>
								<description>Capture/Compare 3 output
								Polarity</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3E</name>
								<description>Capture/Compare 3 output
								enable</description>
								<bitOffset>8</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2NP</name>
								<description>Capture/Compare 2 output
								Polarity</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2NE</name>
								<description>Capture/Compare 2 complementary output
								enable</description>
								<bitOffset>6</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2P</name>
								<description>Capture/Compare 2 output
								Polarity</description>
								<bitOffset>5</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2E</name>
								<description>Capture/Compare 2 output
								enable</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1NP</name>
								<description>Capture/Compare 1 output
								Polarity</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1NE</name>
								<description>Capture/Compare 1 complementary output
								enable</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1P</name>
								<description>Capture/Compare 1 output
								Polarity</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1E</name>
								<description>Capture/Compare 1 output
								enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CNT</name>
						<displayName>CNT</displayName>
						<description>counter</description>
						<addressOffset>0x24</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CNT</name>
								<description>counter value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>PSC</name>
						<displayName>PSC</displayName>
						<description>prescaler</description>
						<addressOffset>0x28</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>PSC</name>
								<description>Prescaler value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>ARR</name>
						<displayName>ARR</displayName>
						<description>auto-reload register</description>
						<addressOffset>0x2C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>ARR</name>
								<description>Auto-reload value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>RCR</name>
						<displayName>RCR</displayName>
						<description>repetition counter register</description>
						<addressOffset>0x30</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>REP</name>
								<description>Repetition counter value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>8</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCR1</name>
						<displayName>CCR1</displayName>
						<description>capture/compare register 1</description>
						<addressOffset>0x34</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CCR1</name>
								<description>Capture/Compare 1 value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCR2</name>
						<displayName>CCR2</displayName>
						<description>capture/compare register 2</description>
						<addressOffset>0x38</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CCR2</name>
								<description>Capture/Compare 2 value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCR3</name>
						<displayName>CCR3</displayName>
						<description>capture/compare register 3</description>
						<addressOffset>0x3C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CCR3</name>
								<description>Capture/Compare value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCR4</name>
						<displayName>CCR4</displayName>
						<description>capture/compare register 4</description>
						<addressOffset>0x40</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CCR4</name>
								<description>Capture/Compare value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>BDTR</name>
						<displayName>BDTR</displayName>
						<description>break and dead-time register</description>
						<addressOffset>0x44</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>MOE</name>
								<description>Main output enable</description>
								<bitOffset>15</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>AOE</name>
								<description>Automatic output enable</description>
								<bitOffset>14</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>BKP</name>
								<description>Break polarity</description>
								<bitOffset>13</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>BKE</name>
								<description>Break enable</description>
								<bitOffset>12</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OSSR</name>
								<description>Off-state selection for Run
								mode</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OSSI</name>
								<description>Off-state selection for Idle
								mode</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>LOCK</name>
								<description>Lock configuration</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>DTG</name>
								<description>Dead-time generator setup</description>
								<bitOffset>0</bitOffset>
								<bitWidth>8</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>DCR</name>
						<displayName>DCR</displayName>
						<description>DMA control register</description>
						<addressOffset>0x48</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>DBL</name>
								<description>DMA burst length</description>
								<bitOffset>8</bitOffset>
								<bitWidth>5</bitWidth>
							</field>
							<field>
								<name>DBA</name>
								<description>DMA base address</description>
								<bitOffset>0</bitOffset>
								<bitWidth>5</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>DMAR</name>
						<displayName>DMAR</displayName>
						<description>DMA address for full transfer</description>
						<addressOffset>0x4C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>DMAB</name>
								<description>DMA register for burst
								accesses</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
				</registers>
		</peripheral>
		<peripheral>
				<name>TIM3</name>
				<description>General purpose timer</description>
				<groupName>TIM</groupName>
				<baseAddress>0x40000400</baseAddress>
				<addressBlock>
					<offset>0x00</offset>
					<size>0x400</size>
					<usage>registers</usage>
				</addressBlock>
				<interrupt>
					<name>TIM3</name>
					<description>TIM3 global Interrupt</description>
					<value>16</value>
				</interrupt>
				<registers>
					<register>
						<name>CR1</name>
						<displayName>CR1</displayName>
						<description>control register 1</description>
						<addressOffset>0x0</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CKD</name>
								<description>Clock division</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>ARPE</name>
								<description>Auto-reload preload enable</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CMS</name>
								<description>Center-aligned mode
								selection</description>
								<bitOffset>5</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>DIR</name>
								<description>Direction</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OPM</name>
								<description>One-pulse mode</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>URS</name>
								<description>Update request source</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UDIS</name>
								<description>Update disable</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CEN</name>
								<description>Counter enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CR2</name>
						<displayName>CR2</displayName>
						<description>control register 2</description>
						<addressOffset>0x4</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>TI1S</name>
								<description>TI1 selection</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>MMS</name>
								<description>Master mode selection</description>
								<bitOffset>4</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>CCDS</name>
								<description>Capture/compare DMA
								selection</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>SMCR</name>
						<displayName>SMCR</displayName>
						<description>slave mode control register</description>
						<addressOffset>0x8</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>MSM</name>
								<description>Master/Slave mode</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TS</name>
								<description>Trigger selection</description>
								<bitOffset>4</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OCCS</name>
								<description>OCREF Clear Selection</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>SMS</name>
								<description>Slave mode selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>DIER</name>
						<displayName>DIER</displayName>
						<description>DMA/Interrupt enable register</description>
						<addressOffset>0xC</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>TDE</name>
								<description>Trigger DMA request enable</description>
								<bitOffset>14</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4DE</name>
								<description>Capture/Compare 4 DMA request
								enable</description>
								<bitOffset>12</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3DE</name>
								<description>Capture/Compare 3 DMA request
								enable</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2DE</name>
								<description>Capture/Compare 2 DMA request
								enable</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1DE</name>
								<description>Capture/Compare 1 DMA request
								enable</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UDE</name>
								<description>Update DMA request enable</description>
								<bitOffset>8</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TIE</name>
								<description>Trigger interrupt enable</description>
								<bitOffset>6</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4IE</name>
								<description>Capture/Compare 4 interrupt
								enable</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3IE</name>
								<description>Capture/Compare 3 interrupt
								enable</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2IE</name>
								<description>Capture/Compare 2 interrupt
								enable</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1IE</name>
								<description>Capture/Compare 1 interrupt
								enable</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UIE</name>
								<description>Update interrupt enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>SR</name>
						<displayName>SR</displayName>
						<description>status register</description>
						<addressOffset>0x10</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CC4OF</name>
								<description>Capture/Compare 4 overcapture
								flag</description>
								<bitOffset>12</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3OF</name>
								<description>Capture/Compare 3 overcapture
								flag</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2OF</name>
								<description>Capture/compare 2 overcapture
								flag</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1OF</name>
								<description>Capture/Compare 1 overcapture
								flag</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TIF</name>
								<description>Trigger interrupt flag</description>
								<bitOffset>6</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4IF</name>
								<description>Capture/Compare 4 interrupt
								flag</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3IF</name>
								<description>Capture/Compare 3 interrupt
								flag</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2IF</name>
								<description>Capture/Compare 2 interrupt
								flag</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1IF</name>
								<description>Capture/compare 1 interrupt
								flag</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UIF</name>
								<description>Update interrupt flag</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>EGR</name>
						<displayName>EGR</displayName>
						<description>event generation register</description>
						<addressOffset>0x14</addressOffset>
						<size>0x20</size>
						<access>write-only</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>TG</name>
								<description>Trigger generation</description>
								<bitOffset>6</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4G</name>
								<description>Capture/compare 4
								generation</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3G</name>
								<description>Capture/compare 3
								generation</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2G</name>
								<description>Capture/compare 2
								generation</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1G</name>
								<description>Capture/compare 1
								generation</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UG</name>
								<description>Update generation</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR1_Output</name>
						<displayName>CCMR1_Output</displayName>
						<description>capture/compare mode register 1 (output
						mode)</description>
						<addressOffset>0x18</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>OC2CE</name>
								<description>Output compare 2 clear
								enable</description>
								<bitOffset>15</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC2M</name>
								<description>Output compare 2 mode</description>
								<bitOffset>12</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OC2PE</name>
								<description>Output compare 2 preload
								enable</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC2FE</name>
								<description>Output compare 2 fast
								enable</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2S</name>
								<description>Capture/Compare 2
								selection</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>OC1CE</name>
								<description>Output compare 1 clear
								enable</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC1M</name>
								<description>Output compare 1 mode</description>
								<bitOffset>4</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OC1PE</name>
								<description>Output compare 1 preload
								enable</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC1FE</name>
								<description>Output compare 1 fast
								enable</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1S</name>
								<description>Capture/Compare 1
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR1_Input</name>
						<displayName>CCMR1_Input</displayName>
						<description>capture/compare mode register 1 (input
						mode)</description>
						<alternateRegister>CCMR1_Output</alternateRegister>
						<addressOffset>0x18</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>IC2F</name>
								<description>Input capture 2 filter</description>
								<bitOffset>12</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>IC2PSC</name>
								<description>Input capture 2 prescaler</description>
								<bitOffset>10</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>CC2S</name>
								<description>Capture/compare 2
								selection</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>IC1F</name>
								<description>Input capture 1 filter</description>
								<bitOffset>4</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>IC1PSC</name>
								<description>Input capture 1 prescaler</description>
								<bitOffset>2</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>CC1S</name>
								<description>Capture/Compare 1
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR2_Output</name>
						<displayName>CCMR2_Output</displayName>
						<description>capture/compare mode register 2 (output
						mode)</description>
						<addressOffset>0x1C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>OC4CE</name>
								<description>Output compare 4 clear
								enable</description>
								<bitOffset>15</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC4M</name>
								<description>Output compare 4 mode</description>
								<bitOffset>12</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OC4PE</name>
								<description>Output compare 4 preload
								enable</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC4FE</name>
								<description>Output compare 4 fast
								enable</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4S</name>
								<description>Capture/Compare 4
								selection</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>OC3CE</name>
								<description>Output compare 3 clear
								enable</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC3M</name>
								<description>Output compare 3 mode</description>
								<bitOffset>4</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OC3PE</name>
								<description>Output compare 3 preload
								enable</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC3FE</name>
								<description>Output compare 3 fast
								enable</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3S</name>
								<description>Capture/Compare 3
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR2_Input</name>
						<displayName>CCMR2_Input</displayName>
						<description>capture/compare mode register 2 (input
						mode)</description>
						<alternateRegister>CCMR2_Output</alternateRegister>
						<addressOffset>0x1C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>IC4F</name>
								<description>Input capture 4 filter</description>
								<bitOffset>12</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>IC4PSC</name>
								<description>Input capture 4 prescaler</description>
								<bitOffset>10</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>CC4S</name>
								<description>Capture/Compare 4
								selection</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>IC3F</name>
								<description>Input capture 3 filter</description>
								<bitOffset>4</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>IC3PSC</name>
								<description>Input capture 3 prescaler</description>
								<bitOffset>2</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>CC3S</name>
								<description>Capture/Compare 3
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCER</name>
						<displayName>CCER</displayName>
						<description>capture/compare enable
						register</description>
						<addressOffset>0x20</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
						    <field>
								<name>CC4NP</name>
								<description>
									Capture/Compare 4 output
									Polarity
								</description>
								<bitOffset>15</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4P</name>
								<description>
									Capture/Compare 4 output
									Polarity
								</description>
								<bitOffset>13</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC4E</name>
								<description>
									Capture/Compare 4 output
									enable
								</description>
								<bitOffset>12</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3NP</name>
								<description>
									Capture/Compare 3 output
									Polarity
								</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3P</name>
								<description>
									Capture/Compare 3 output
									Polarity
								</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC3E</name>
								<description>
									Capture/Compare 3 output
									enable
								</description>
								<bitOffset>8</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2NP</name>
								<description>
									Capture/Compare 2 output
									Polarity
								</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2P</name>
								<description>
									Capture/Compare 2 output
									Polarity
								</description>
								<bitOffset>5</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC2E</name>
								<description>
									Capture/Compare 2 output
									enable
								</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1NP</name>
								<description>
									Capture/Compare 1 output
									Polarity
								</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1P</name>
								<description>Capture/Compare 1 output
								Polarity</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1E</name>
								<description>Capture/Compare 1 output
								enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CNT</name>
						<displayName>CNT</displayName>
						<description>counter</description>
						<addressOffset>0x24</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CNT</name>
								<description>counter value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>PSC</name>
						<displayName>PSC</displayName>
						<description>prescaler</description>
						<addressOffset>0x28</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>PSC</name>
								<description>Prescaler value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>ARR</name>
						<displayName>ARR</displayName>
						<description>auto-reload register</description>
						<addressOffset>0x2C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>ARR</name>
								<description>Auto-reload value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCR1</name>
						<displayName>CCR1</displayName>
						<description>capture/compare register 1</description>
						<addressOffset>0x34</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CCR1</name>
								<description>Capture/Compare 1 value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCR2</name>
						<displayName>CCR2</displayName>
						<description>capture/compare register 2</description>
						<addressOffset>0x38</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CCR2</name>
								<description>Capture/Compare 2 value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCR3</name>
						<displayName>CCR3</displayName>
						<description>capture/compare register 3</description>
						<addressOffset>0x3C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CCR3</name>
								<description>Capture/Compare value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCR4</name>
						<displayName>CCR4</displayName>
						<description>capture/compare register 4</description>
						<addressOffset>0x40</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CCR4</name>
								<description>Capture/Compare value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>DCR</name>
						<displayName>DCR</displayName>
						<description>DMA control register</description>
						<addressOffset>0x48</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>DBL</name>
								<description>DMA burst length</description>
								<bitOffset>8</bitOffset>
								<bitWidth>5</bitWidth>
							</field>
							<field>
								<name>DBA</name>
								<description>DMA base address</description>
								<bitOffset>0</bitOffset>
								<bitWidth>5</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>DMAR</name>
						<displayName>DMAR</displayName>
						<description>DMA address for full transfer</description>
						<addressOffset>0x4C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>DMAB</name>
								<description>DMA register for burst
								accesses</description>
								<bitOffset>0</bitOffset>
								<bitWidth>32</bitWidth>
							</field>
						</fields>
					</register>
				</registers>
		</peripheral>
		<peripheral>
				<name>TIM14</name>
				<description>General purpose timer</description>
				<groupName>TIM</groupName>
				<baseAddress>0x40002000</baseAddress>
				<addressBlock>
					<offset>0x00</offset>
					<size>0x400</size>
					<usage>registers</usage>
				</addressBlock>
				<interrupt>
					<name>TIM14</name>
					<description>TIM14 global Interrupt</description>
					<value>19</value>
				</interrupt>
				<registers>
					<register>
						<name>CR1</name>
						<displayName>CR1</displayName>
						<description>TIM14 control register1</description>
						<addressOffset>0x0</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CKD</name>
								<description>Prescaler factor</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>ARPE</name>
								<description>Auto-reload preload enable</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>URS</name>
								<description>Update request source</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UDIS</name>
								<description>Update disable</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CEN</name>
								<description>Counter enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>DIER</name>
						<displayName>DIER</displayName>
						<description>DMA/Interrupt enable register</description>
						<addressOffset>0xC</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CC1IE</name>
								<description>Compare/</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UIE</name>
								<description>Update interrupt enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>SR</name>
						<displayName>SR</displayName>
						<description>status register</description>
						<addressOffset>0x10</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CC1OF</name>
								<description>Compare/capture 1 flag</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1IF</name>
								<description>Compare/capture 1  interrupt flag</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UIF</name>
								<description>Update interrupt flag</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>EGR</name>
						<displayName>EGR</displayName>
						<description>event generation register</description>
						<addressOffset>0x14</addressOffset>
						<size>0x20</size>
						<access>write-only</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CC1G</name>
								<description>Compare/capture1 event</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UG</name>
								<description>Update generation</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR1_Output</name>
						<displayName>CCMR1_Output</displayName>
						<description>capture/compare mode register (output
						mode)</description>
						<addressOffset>0x18</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>OC1M</name>
								<description>Output Compare 1 mode</description>
								<bitOffset>4</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OC1PE</name>
								<description>Output Compare 1 preload
								enable</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC1FE</name>
								<description>Output Compare 1 fast
								enable</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1S</name>
								<description>Capture/Compare 1
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR1_Input</name>
						<displayName>CCMR1_Input</displayName>
						<description>capture/compare mode register 1 (input
						mode)</description>
						<alternateRegister>CCMR1_Output</alternateRegister>
						<addressOffset>0x18</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>IC1F</name>
								<description>Input capture 1 filter</description>
								<bitOffset>4</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>IC1PSC</name>
								<description>Input capture 1 prescaler</description>
								<bitOffset>2</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>CC1S</name>
								<description>Capture/Compare 1
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCER</name>
						<displayName>CCER</displayName>
						<description>capture/compare enable
						register</description>
						<addressOffset>0x20</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CC1NP</name>
								<description>Capture/Compare 1 output
								Polarity</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1P</name>
								<description>Capture/Compare 1 output
								Polarity</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1E</name>
								<description>Capture/Compare 1 output
								enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CNT</name>
						<displayName>CNT</displayName>
						<description>counter</description>
						<addressOffset>0x24</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CNT</name>
								<description>counter value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>PSC</name>
						<displayName>PSC</displayName>
						<description>prescaler</description>
						<addressOffset>0x28</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>PSC</name>
								<description>Prescaler value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>ARR</name>
						<displayName>ARR</displayName>
						<description>auto-reload register</description>
						<addressOffset>0x2C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>ARR</name>
								<description>Auto-reload value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCR1</name>
						<displayName>CCR1</displayName>
						<description>capture/compare register 1</description>
						<addressOffset>0x34</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CCR1</name>
								<description>Capture/Compare 1 value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>OR</name>
						<displayName>OR</displayName>
						<description>Option register</description>
						<addressOffset>0x50</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>TI1_RMP</name>
								<description>TIM14 channel1 input remap</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
				</registers>
		</peripheral>
		<peripheral>
				<name>TIM16</name>
				<description>General purpose timer</description>
				<groupName>TIM</groupName>
				<baseAddress>0x40014400</baseAddress>
				<addressBlock>
					<offset>0x00</offset>
					<size>0x400</size>
					<usage>registers</usage>
				</addressBlock>
				<interrupt>
					<name>TIM16</name>
					<description>TIM16 global Interrupt</description>
					<value>21</value>
				</interrupt>
				<registers>
					<register>
						<name>CR1</name>
						<displayName>CR1</displayName>
						<description>TIM16 control register1</description>
						<addressOffset>0x0</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CKD</name>
								<description>Prescaler factor</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>ARPE</name>
								<description>Auto-reload preload enable</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OPM</name>
								<description>One pulse mode</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>URS</name>
								<description>Update request source</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UDIS</name>
								<description>Update disable</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CEN</name>
								<description>Counter enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CR2</name>
						<displayName>CR2</displayName>
						<description>control register 2</description>
						<addressOffset>0x4</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>OIS1N</name>
								<description>Output Idle state 1</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OIS1</name>
								<description>Output Idle state 1</description>
								<bitOffset>8</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CCDS</name>
								<description>Capture/compare DMA
								selection</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CCPC</name>
								<description>Capture/compare preloaded
								control</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>DIER</name>
						<displayName>DIER</displayName>
						<description>DMA/Interrupt enable register</description>
						<addressOffset>0xC</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CC1DE</name>
								<description>Compare/capture DMA requeset enable</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UDE</name>
								<description>Update DMA request enable </description>
								<bitOffset>8</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>BIE</name>
								<description>Break interrupt enable</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMIE</name>
								<description>Com interrupt enable</description>
								<bitOffset>5</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1IE</name>
								<description>Capture/Compare 1 interrupt enable</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UIE</name>
								<description>Update interrupt enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>SR</name>
						<displayName>SR</displayName>
						<description>status register</description>
						<addressOffset>0x10</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CC1OF</name>
								<description>Update interrupt flag</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>BIF</name>
								<description>Break interrupt flag</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMIF</name>
								<description>Com interrupt flag</description>
								<bitOffset>5</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1IF</name>
								<description>Capture/Compare 1 interrupt flag</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UIF</name>
								<description>Update interrupt flag</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>EGR</name>
						<displayName>EGR</displayName>
						<description>event generation register</description>
						<addressOffset>0x14</addressOffset>
						<size>0x20</size>
						<access>write-only</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>BG</name>
								<description>Break event generation</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>							
							<field>
								<name>COMG</name>
								<description>COM evnet generation</description>
								<bitOffset>5</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1G</name>
								<description>Capture/Compare 1 generation</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>UG</name>
								<description>Update generation</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR1_Output</name>
						<displayName>CCMR1_Output</displayName>
						<description>capture/compare mode register (output
						mode)</description>
						<addressOffset>0x18</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>OC1M</name>
								<description>Output Compare 1 mode</description>
								<bitOffset>4</bitOffset>
								<bitWidth>3</bitWidth>
							</field>
							<field>
								<name>OC1PE</name>
								<description>Output Compare 1 preload
								enable</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OC1FE</name>
								<description>Output Compare 1 fast
								enable</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1S</name>
								<description>Capture/Compare 1
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCMR1_Input</name>
						<displayName>CCMR1_Input</displayName>
						<description>capture/compare mode register 1 (input
						mode)</description>
						<alternateRegister>CCMR1_Output</alternateRegister>
						<addressOffset>0x18</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>IC1F</name>
								<description>Input capture 1 filter</description>
								<bitOffset>4</bitOffset>
								<bitWidth>4</bitWidth>
							</field>
							<field>
								<name>IC1PSC</name>
								<description>Input capture 1 prescaler</description>
								<bitOffset>2</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>CC1S</name>
								<description>Capture/Compare 1
								selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCER</name>
						<displayName>CCER</displayName>
						<description>capture/compare enable
						register</description>
						<addressOffset>0x20</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>CC1NP</name>
								<description>Capture/Compare 1 output
								Polarity</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1NE</name>
								<description>Capture/Compare 1 complementary output
								enable</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1P</name>
								<description>Capture/Compare 1 output
								Polarity</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>CC1E</name>
								<description>Capture/Compare 1 output
								enable</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CNT</name>
						<displayName>CNT</displayName>
						<description>counter</description>
						<addressOffset>0x24</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CNT</name>
								<description>counter value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>PSC</name>
						<displayName>PSC</displayName>
						<description>prescaler</description>
						<addressOffset>0x28</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>PSC</name>
								<description>Prescaler value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>ARR</name>
						<displayName>ARR</displayName>
						<description>auto-reload register</description>
						<addressOffset>0x2C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>ARR</name>
								<description>Auto-reload value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>RCR</name>
						<displayName>RCR</displayName>
						<description>repetition counter register</description>
						<addressOffset>0x30</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>REP</name>
								<description>Repetition counter value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>8</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CCR1</name>
						<displayName>CCR1</displayName>
						<description>capture/compare register 1</description>
						<addressOffset>0x34</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>CCR1</name>
								<description>Capture/Compare 1 value</description>
								<bitOffset>0</bitOffset>
								<bitWidth>16</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>BDTR</name>
						<displayName>BDTR</displayName>
						<description>break and dead-time register</description>
						<addressOffset>0x44</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>MOE</name>
								<description>Main output enable</description>
								<bitOffset>15</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>AOE</name>
								<description>Automatic output enable</description>
								<bitOffset>14</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>BKP</name>
								<description>Break polarity</description>
								<bitOffset>13</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>BKE</name>
								<description>Break enable</description>
								<bitOffset>12</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OSSR</name>
								<description>Off-state selection for Run
								mode</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>OSSI</name>
								<description>Off-state selection for Idle
								mode</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>LOCK</name>
								<description>Lock configuration</description>
								<bitOffset>8</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>DTG</name>
								<description>Dead-time generator setup</description>
								<bitOffset>0</bitOffset>
								<bitWidth>8</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>DCR</name>
						<displayName>DCR</displayName>
						<description>DMA control register</description>
						<addressOffset>0x48</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>DBL</name>
								<description>DMA burst length</description>
								<bitOffset>8</bitOffset>
								<bitWidth>5</bitWidth>
							</field>
							<field>
								<name>DBA</name>
								<description>DMA base address</description>
								<bitOffset>0</bitOffset>
								<bitWidth>5</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>DMAR</name>
						<displayName>DMAR</displayName>
						<description>DMA address for full transfer</description>
						<addressOffset>0x4C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x0000</resetValue>
						<fields>
							<field>
								<name>DMAB</name>
								<description>DMA register for burst
								accesses</description>
								<bitOffset>0</bitOffset>
								<bitWidth>32</bitWidth>
							</field>
						</fields>
					</register>
				</registers>
		</peripheral>
		<peripheral derivedFrom="TIM16">
				<name>TIM17</name>
				<baseAddress>0x40014800</baseAddress>
				<interrupt>
					<name>TIM17</name>
					<description>TIM17 global Interrupt</description>
					<value>22</value>
				</interrupt>
		</peripheral>
		<peripheral>
				<name>SYSCFG</name>
				<description>System configuration controller</description>
				<groupName>SYSCFG</groupName>
				<baseAddress>0x40010000</baseAddress>
				<addressBlock>
					<offset>0x0</offset>
					<size>0x30</size>
					<usage>registers</usage>
				</addressBlock>
				<registers>
					<register>
						<name>CFGR1</name>
						<displayName>CFGR1</displayName>
						<description>SYSCFG configuration register
						1</description>
						<addressOffset>0x0</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>I2C_PF1_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PF1</description>
								<bitOffset>30</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PF0_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PF0</description>
								<bitOffset>29</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PB8_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PB8</description>
								<bitOffset>28</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PB7_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PB7</description>
								<bitOffset>27</bitOffset>
								<bitWidth>1</bitWidth>
							</field><field>
								<name>I2C_PB6_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PB6</description>
								<bitOffset>26</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PA12_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PA12</description>
								<bitOffset>25</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PA11_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PA11</description>
								<bitOffset>24</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PA10_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PA10</description>
								<bitOffset>23</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PA9_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PA9</description>
								<bitOffset>22</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PA8_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PA8</description>
								<bitOffset>21</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PA7_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PA7</description>
								<bitOffset>20</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PA3_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PA3</description>
								<bitOffset>19</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>I2C_PA2_ANF</name>
								<description> Analog filter enable control driving capability
								activation bits PA2</description>
								<bitOffset>18</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>MEM_MODE</name>
								<description>Memory mapping selection
								bits</description>
								<bitOffset>0</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CFGR2</name>
						<displayName>CFGR2</displayName>
						<description>SYSCFG configuration register
						2</description>
						<addressOffset>0x18</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>ETR_SRC_TIM1</name>
								<description>TIM1 ETR source selection</description>
								<bitOffset>9</bitOffset>
								<bitWidth>2</bitWidth>
							</field>
							<field>
								<name>COMP2_BRK_TIM17</name>
								<description>COMP2 is enable to input of TIM17 break</description>
								<bitOffset>8</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMP1_BRK_TIM17</name>
								<description>COMP1 is enable to input of TIM17 break</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMP2_BRK_TIM16</name>
								<description>COMP2 is enable to input of TIM16 break</description>
								<bitOffset>6</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMP1_BRK_TIM16</name>
								<description>COMP1 is enable to input of TIM16 break</description>
								<bitOffset>5</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMP2_BRK_TIM1</name>
								<description>COMP2 is enable to input of TIM1 break</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>COMP1_BRK_TIM1</name>
								<description>COMP1 is enable to input of TIM1 break </description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>PVD_LOCK</name>
								<description>PVD lock enable bit</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>LOCKUP_LOCK</name>
								<description>Cortex-M0+ LOCKUP bit enable
								bit</description>
								<bitOffset>0</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
						</fields>
					</register>
					<register>
						<name>CFGR3</name>
						<displayName>CFGR3</displayName>
						<description>SYSCFG configuration register
						3</description>
						<addressOffset>0x1C</addressOffset>
						<size>0x20</size>
						<access>read-write</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>DMA3_MAP</name>
								<description>DMA channel3 requeset selection</description>
								<bitOffset>16</bitOffset>
								<bitWidth>5</bitWidth>
							</field>
							<field>
								<name>DMA2_MAP</name>
								<description>DMA channel2 requeset selection</description>
								<bitOffset>8</bitOffset>
								<bitWidth>5</bitWidth>
							</field>
							<field>
								<name>DMA1_MAP</name>
								<description>DMA channel1 requeset selection</description>
								<bitOffset>0</bitOffset>
								<bitWidth>5</bitWidth>
							</field>
						</fields>
					</register>
				</registers>
		</peripheral>
		<peripheral>
				<name>DMA</name>
				<description>Direct memory access</description>
				<groupName>DMA</groupName>
				<baseAddress>0x40020000</baseAddress>
				<addressBlock>
					<offset>0x0</offset>
					<size>0x400</size>
					<usage>registers</usage>
				</addressBlock>
				<interrupt>
					<name>DMA_Channel1</name>
					<description>DMA Channel 1 Interrupt</description>
					<value>9</value>
				</interrupt>
				<interrupt>
					<name>DMA_Channel2_3</name>
					<description>DMA Channel 2 and Channel 3 Interrupt</description>
					<value>10</value>
				</interrupt>
				<registers>
					<register>
						<name>ISR</name>
						<displayName>ISR</displayName>
						<description>DMA interrupt status register
						(DMA_ISR)</description>
						<addressOffset>0x0</addressOffset>
						<size>0x20</size>
						<access>read-only</access>
						<resetValue>0x00000000</resetValue>
						<fields>
							<field>
								<name>TEIF3</name>
								<description>Channel 3 Transfer Error
								flag</description>
								<bitOffset>11</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>HTIF3</name>
								<description>Channel 3 Half Transfer Complete
								flag</description>
								<bitOffset>10</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TCIF3</name>
								<description>Channel 3 Transfer Complete
								flag</description>
								<bitOffset>9</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>GIF3</name>
								<description>Channel 3 Global interrupt
								flag</description>
								<bitOffset>8</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TEIF2</name>
								<description>Channel 2 Transfer Error
								flag</description>
								<bitOffset>7</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>HTIF2</name>
								<description>Channel 2 Half Transfer Complete
								flag</description>
								<bitOffset>6</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TCIF2</name>
								<description>Channel 2 Transfer Complete
								flag</description>
								<bitOffset>5</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>GIF2</name>
								<description>Channel 2 Global interrupt
								flag</description>
								<bitOffset>4</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TEIF1</name>
								<description>Channel 1 Transfer Error
								flag</description>
								<bitOffset>3</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>HTIF1</name>
								<description>Channel 1 Half Transfer Complete
								flag</description>
								<bitOffset>2</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
								<name>TCIF1</name>
								<description>Channel 1 Transfer Complete
								flag</description>
								<bitOffset>1</bitOffset>
								<bitWidth>1</bitWidth>
							</field>
							<field>
							  <name>GIF1</name>
							  <description>Channel 1 Global interrupt
							  flag</description>
							  <bitOffset>0</bitOffset>
							  <bitWidth>1</bitWidth>
						 </field>
					  </fields>
				  </register>
				    <register>
					<name>IFCR</name>
					<displayName>IFCR</displayName>
					<description>DMA interrupt flag clear register
					(DMA_IFCR)</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>write-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>CTEIF3</name>
							<description>Channel 3 Transfer Error
							clear</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHTIF3</name>
							<description>Channel 3 Half Transfer
							clear</description>
							<bitOffset>10</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CTCIF3</name>
							<description>Channel 3 Transfer Complete
							clear</description>
							<bitOffset>9</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CGIF3</name>
							<description>Channel 3 Global interrupt
							clear</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CTEIF2</name>
							<description>Channel 2 Transfer Error
							clear</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHTIF2</name>
							<description>Channel 2 Half Transfer
							clear</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CTCIF2</name>
							<description>Channel 2 Transfer Complete
							clear</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CGIF2</name>
							<description>Channel 2 Global interrupt
							clear</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CTEIF1</name>
							<description>Channel 1 Transfer Error
							clear</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CHTIF1</name>
							<description>Channel 1 Half Transfer
							clear</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CTCIF1</name>
							<description>Channel 1 Transfer Complete
							clear</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CGIF1</name>
							<description>Channel 1 Global interrupt
							clear</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				  </register>
				  <register>
					<name>CCR1</name>
					<displayName>CCR1</displayName>
					<description>DMA channel configuration register
					(DMA_CCR)</description>
					<addressOffset>0x8</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>MEM2MEM</name>
							<description>Memory to memory mode</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PL</name>
							<description>Channel Priority level</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MSIZE</name>
							<description>Memory size</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PSIZE</name>
							<description>Peripheral size</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MINC</name>
							<description>Memory increment mode</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PINC</name>
							<description>Peripheral increment mode</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CIRC</name>
							<description>Circular mode</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DIR</name>
							<description>Data transfer direction</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TEIE</name>
							<description>Transfer error interrupt
							enable</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HTIE</name>
							<description>Half Transfer interrupt
							enable</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TCIE</name>
							<description>Transfer complete interrupt
							enable</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EN</name>
							<description>Channel enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>						
					</fields>
				  </register>
				  <register>
					<name>CNDTR1</name>
					<displayName>CNDTR1</displayName>
					<description>DMA channel 1 number of data
					register</description>
					<addressOffset>0xC</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>NDT</name>
							<description>Number of data to transfer</description>
							<bitOffset>0</bitOffset>
							<bitWidth>16</bitWidth>
						</field>
					</fields>
				  </register>
				  <register>
					<name>CPAR1</name>
					<displayName>CPAR1</displayName>
					<description>DMA channel 1 peripheral address
					register</description>
					<addressOffset>0x10</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>PA</name>
							<description>Peripheral address</description>
							<bitOffset>0</bitOffset>
							<bitWidth>32</bitWidth>
						</field>
					</fields>
				  </register>
				  <register>
					<name>CMAR1</name>
					<displayName>CMAR1</displayName>
					<description>DMA channel 1 memory address
					register</description>
					<addressOffset>0x14</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>MA</name>
							<description>Memory address</description>
							<bitOffset>0</bitOffset>
							<bitWidth>32</bitWidth>
						</field>
					</fields>
				  </register>
				  <register>
					<name>CCR2</name>
					<displayName>CCR2</displayName>
					<description>DMA channel configuration register
					(DMA_CCR)</description>
					<addressOffset>0x1C</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>MEM2MEM</name>
							<description>Memory to memory mode</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PL</name>
							<description>Channel Priority level</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MSIZE</name>
							<description>Memory size</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PSIZE</name>
							<description>Peripheral size</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MINC</name>
							<description>Memory increment mode</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PINC</name>
							<description>Peripheral increment mode</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CIRC</name>
							<description>Circular mode</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DIR</name>
							<description>Data transfer direction</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TEIE</name>
							<description>Transfer error interrupt
							enable</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HTIE</name>
							<description>Half Transfer interrupt
							enable</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TCIE</name>
							<description>Transfer complete interrupt
							enable</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EN</name>
							<description>Channel enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				  </register>
				  <register>
					<name>CNDTR2</name>
					<displayName>CNDTR2</displayName>
					<description>DMA channel 2 number of data
					register</description>
					<addressOffset>0x20</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>NDT</name>
							<description>Number of data to transfer</description>
							<bitOffset>0</bitOffset>
							<bitWidth>16</bitWidth>
						</field>
					</fields>
				  </register>
				  <register>
					<name>CPAR2</name>
					<displayName>CPAR2</displayName>
					<description>DMA channel 2 peripheral address
					register</description>
					<addressOffset>0x24</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>PA</name>
							<description>Peripheral address</description>
							<bitOffset>0</bitOffset>
							<bitWidth>32</bitWidth>
						</field>
					</fields>
				  </register>
					<register>
					<name>CMAR2</name>
					<displayName>CMAR2</displayName>
					<description>DMA channel 2 memory address
					register</description>
					<addressOffset>0x28</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>MA</name>
							<description>Memory address</description>
							<bitOffset>0</bitOffset>
							<bitWidth>32</bitWidth>
						</field>
					</fields>
					</register>
					<register>
					<name>CCR3</name>
					<displayName>CCR3</displayName>
					<description>DMA channel configuration register
					(DMA_CCR)</description>
					<addressOffset>0x30</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>MEM2MEM</name>
							<description>Memory to memory mode</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PL</name>
							<description>Channel Priority level</description>
							<bitOffset>12</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MSIZE</name>
							<description>Memory size</description>
							<bitOffset>10</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>PSIZE</name>
							<description>Peripheral size</description>
							<bitOffset>8</bitOffset>
							<bitWidth>2</bitWidth>
						</field>
						<field>
							<name>MINC</name>
							<description>Memory increment mode</description>
							<bitOffset>7</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PINC</name>
							<description>Peripheral increment mode</description>
							<bitOffset>6</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>CIRC</name>
							<description>Circular mode</description>
							<bitOffset>5</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>DIR</name>
							<description>Data transfer direction</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TEIE</name>
							<description>Transfer error interrupt
							enable</description>
							<bitOffset>3</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>HTIE</name>
							<description>Half Transfer interrupt
							enable</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>TCIE</name>
							<description>Transfer complete interrupt
							enable</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EN</name>
							<description>Channel enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
					</register>
					<register>
					<name>CNDTR3</name>
					<displayName>CNDTR3</displayName>
					<description>DMA channel 3 number of data
					register</description>
					<addressOffset>0x34</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>NDT</name>
							<description>Number of data to transfer</description>
							<bitOffset>0</bitOffset>
							<bitWidth>16</bitWidth>
						</field>
					</fields>
					</register>
					<register>
					<name>CPAR3</name>
					<displayName>CPAR3</displayName>
					<description>DMA channel 3 peripheral address
					register</description>
					<addressOffset>0x38</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>PA</name>
							<description>Peripheral address</description>
							<bitOffset>0</bitOffset>
							<bitWidth>32</bitWidth>
						</field>
					</fields>
					</register>
					<register>
					<name>CMAR3</name>
					<displayName>CMAR3</displayName>
					<description>DMA channel 3 memory address
					register</description>
					<addressOffset>0x3C</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>MA</name>
							<description>Memory address</description>
							<bitOffset>0</bitOffset>
							<bitWidth>32</bitWidth>
						</field>
					</fields>
					</register>
			  </registers>
		</peripheral>
		<peripheral>
			<name>FLASH</name>
			<description>Flash</description>
			<groupName>Flash</groupName>
			<baseAddress>0x40022000</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<interrupt>
				<name>FLASH</name>
				<description>FLASH global Interrupt</description>
				<value>3</value>
			</interrupt>
			<registers>
				<register>
					<name>ACR</name>
					<displayName>ACR</displayName>
					<description>Access control register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000600</resetValue>
					<fields>
						<field>
							<name>LATENCY</name>
							<description>Latency</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>KEYR</name>
					<displayName>KEYR</displayName>
					<description>Flash key register</description>
					<addressOffset>0x8</addressOffset>
					<size>0x20</size>
					<access>write-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>KEY</name>
							<description>Flash key</description>
							<bitOffset>0</bitOffset>
							<bitWidth>32</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>OPTKEYR</name>
					<displayName>OPTKEYR</displayName>
					<description>Option byte key register</description>
					<addressOffset>0xC</addressOffset>
					<size>0x20</size>
					<access>write-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>OPTKEY</name>
							<description>Option byte key</description>
							<bitOffset>0</bitOffset>
							<bitWidth>32</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>SR</name>
					<displayName>SR</displayName>
					<description>Status register</description>
					<addressOffset>0x10</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>BSY</name>
							<description>Busy</description>
							<bitOffset>16</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OPTVERR</name>
							<description>Option and Engineering bits loading
							validity error</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>WRPERR</name>
							<description>Write protected error</description>
							<bitOffset>4</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EOP</name>
							<description>End of operation</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CR</name>
					<displayName>CR</displayName>
					<description>Flash control register</description>
					<addressOffset>0x14</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0xC0000000</resetValue>
					<fields>
						<field>
							<name>LOCK</name>
							<description>FLASH_CR Lock</description>
							<bitOffset>31</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OPTLOCK</name>
							<description>Options Lock</description>
							<bitOffset>30</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OBL_LAUNCH</name>
							<description>Force the option byte
							loading</description>
							<bitOffset>27</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>ERRIE</name>
							<description>Error interrupt enable</description>
							<bitOffset>25</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>EOPIE</name>
							<description>End of operation interrupt
							enable</description>
							<bitOffset>24</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PGTSTRT</name>
							<description>Flash main memory program start</description>
							<bitOffset>19</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>OPTSTRT</name>
							<description>Option byte program start</description>
							<bitOffset>17</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>SER</name>
							<description>Sector erase</description>
							<bitOffset>11</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>MER</name>
							<description>Mass erase</description>
							<bitOffset>2</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PER</name>
							<description>Page erase</description>
							<bitOffset>1</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>PG</name>
							<description>Programming</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>OPTR</name>
					<displayName>OPTR</displayName>
					<description>Flash option register</description>
					<addressOffset>0x20</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x4F55B0AA</resetValue>
					<fields>						
						<field>
							<name>nBOOT1</name>
							<description>Boot configuration</description>
							<bitOffset>15</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>NRST_MODE</name>
							<description>NRST_MODE</description>
							<bitOffset>14</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>WWDG_SW</name>
							<description>Window watchdog selection</description>
							<bitOffset>13</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>IDWG_SW</name>
							<description>Independent watchdog
							selection</description>
							<bitOffset>12</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>BORF_LEV</name>
							<description>These bits contain the VDD supply level
							threshold that activates the reset</description>
							<bitOffset>9</bitOffset>
							<bitWidth>3</bitWidth>
						</field>
						<field>
							<name>BOREN</name>
							<description>BOR reset Level</description>
							<bitOffset>8</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
						<field>
							<name>RDP</name>
							<description>Read Protection </description>
							<bitOffset>0</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>SDKR</name>
					<displayName>SDKR</displayName>
					<description>Flash SDK address 
					register</description>
					<addressOffset>0x24</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0xFFE0001F</resetValue>
					<fields>
						<field>
							<name>SDK_END</name>
							<description>SDK area end address</description>
							<bitOffset>8</bitOffset>
							<bitWidth>5</bitWidth>
						</field>
						<field>
							<name>SDK_STRT</name>
							<description>SDK area start address</description>
							<bitOffset>0</bitOffset>
							<bitWidth>5</bitWidth>
						</field>
					</fields>					
				</register>						
				<register>
					<name>WRPR</name>
					<displayName>WRPR</displayName>
					<description>Flash WRP address
					register</description>
					<addressOffset>0x2C</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x0000FFFF</resetValue>
					<fields>
						<field>
							<name>WRP</name>
							<description>WRP address </description>
							<bitOffset>0</bitOffset>
							<bitWidth>16</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>STCR</name>
					<displayName>STCR</displayName>
					<description>Flash sleep time config
					register</description>
					<addressOffset>0x90</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00006400</resetValue>
					<fields>
						<field>
							<name>SLEEP_TIME</name>
							<description>FLash sleep time configuration(counter based on HSI_10M)</description>
							<bitOffset>8</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
						<field>
							<name>SLEEP_EN</name>
							<description>FLash sleep enable</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>TS0</name>
					<displayName>TS0</displayName>
					<description>Flash TS0 
					register</description>
					<addressOffset>0x100</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x000000B4</resetValue>
					<fields>
						<field>
							<name>TS0</name>
							<description>FLash TS0 register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>TS1</name>
					<displayName>TS1</displayName>
					<description>Flash TS1 
					register</description>
					<addressOffset>0x104</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x000001B0</resetValue>
					<fields>
						<field>
							<name>TS1</name>
							<description>FLash TS1 register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>9</bitWidth>
						</field>
					</fields>
				</register>	
				<register>
					<name>TS2P</name>
					<displayName>TS2P</displayName>
					<description>Flash TS2P 
					register</description>
					<addressOffset>0x108</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x000000B4</resetValue>
					<fields>
						<field>
							<name>TS2P</name>
							<description>FLash TS2P register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
					</fields>
				</register>	
				<register>
					<name>TPS3</name>
					<displayName>TPS3</displayName>
					<description>Flash TPS3 
					register</description>
					<addressOffset>0x10C</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x000006C0</resetValue>
					<fields>
						<field>
							<name>TPS3</name>
							<description>FLash TPS3 register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>11</bitWidth>
						</field>
					</fields>
				</register>	
				<register>
					<name>TS3</name>
					<displayName>TS3</displayName>
					<description>Flash TS3 
					register</description>
					<addressOffset>0x110</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x000000B4</resetValue>
					<fields>
						<field>
							<name>TS3</name>
							<description>FLash TS3 register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
					</fields>
				</register>		
				<register>
					<name>PERTPE</name>
					<displayName>PERTPE</displayName>
					<description>Flash PERTPE 
					register</description>
					<addressOffset>0x114</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x0000EA60</resetValue>
					<fields>
						<field>
							<name>PERTPE</name>
							<description>FLash PERTPE register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>17</bitWidth>
						</field>
					</fields>
				</register>	
				<register>
					<name>SMERTPE</name>
					<displayName>SMERTPE</displayName>
					<description>Flash SMERTPE 
					register</description>
					<addressOffset>0x118</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x0000FD20</resetValue>
					<fields>
						<field>
							<name>SMERTPE</name>
							<description>FLash SMERTPE register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>17</bitWidth>
						</field>
					</fields>					
				</register>	
				<register>
					<name>PRGTPE</name>
					<displayName>PRGTPE</displayName>
					<description>Flash PRGTPE 
					register</description>
					<addressOffset>0x11C</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00008CA0</resetValue>
					<fields>
						<field>
							<name>PRGTPE</name>
							<description>FLash PRGTPE register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>16</bitWidth>
						</field>
					</fields>					
				</register>	
				<register>
					<name>PRETPE</name>
					<displayName>PRETPE</displayName>
					<description>Flash PRETPE 
					register</description>
					<addressOffset>0x120</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x000012C0</resetValue>
					<fields>
						<field>
							<name>PRETPE</name>
							<description>FLash PRETPE register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>13</bitWidth>
						</field>
					</fields>					
				</register>																	
			</registers>
		</peripheral>
		<peripheral>
			<name>CRC</name>
			<description>CRC calculation unit</description>
			<groupName>CRC</groupName>
			<baseAddress>0x40023000</baseAddress>
			<addressBlock>
				<offset>0x0</offset>
				<size>0x400</size>
				<usage>registers</usage>
			</addressBlock>
			<registers>
				<register>
					<name>DR</name>
					<displayName>DR</displayName>
					<description>Data register</description>
					<addressOffset>0x0</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0xFFFFFFFF</resetValue>
					<fields>
						<field>
							<name>DR</name>
							<description>Data Register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>32</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>IDR</name>
					<displayName>IDR</displayName>
					<description>Independent Data register</description>
					<addressOffset>0x4</addressOffset>
					<size>0x20</size>
					<access>read-write</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>IDR</name>
							<description>Independent Data register</description>
							<bitOffset>0</bitOffset>
							<bitWidth>8</bitWidth>
						</field>
					</fields>
				</register>
				<register>
					<name>CR</name>
					<displayName>CR</displayName>
					<description>Control register</description>
					<addressOffset>0x8</addressOffset>
					<size>0x20</size>
					<access>write-only</access>
					<resetValue>0x00000000</resetValue>
					<fields>
						<field>
							<name>RESET</name>
							<description>Reset bit</description>
							<bitOffset>0</bitOffset>
							<bitWidth>1</bitWidth>
						</field>
					</fields>
				</register>
			</registers>
		</peripheral>
    <peripheral>
      <name>SPI1</name>
      <description>Serial peripheral interface</description>
      <groupName>SPI</groupName>
      <baseAddress>0x40013000</baseAddress>
      <addressBlock>
        <offset>0x0</offset>
        <size>0x400</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>SPI1</name>
        <description>SPI1 global Interrupt</description>
        <value>25</value>
      </interrupt>
      <registers>
        <register>
          <name>CR1</name>
          <displayName>CR1</displayName>
          <description>control register 1</description>
          <addressOffset>0x0</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>BIDIMODE</name>
              <description>Bidirectional data mode
              enable</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>BIDIOE</name>
              <description>Output enable in bidirectional
              mode</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>RXONLY</name>
              <description>Receive only</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>SSM</name>
              <description>Software slave management</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>SSI</name>
              <description>Internal slave selection</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>LSBFIRST</name>
              <description>Frame format</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>SPE</name>
              <description>SPI enable</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>BR</name>
              <description>Baud rate control</description>
              <bitOffset>3</bitOffset>
              <bitWidth>3</bitWidth>
            </field>
            <field>
              <name>MSTR</name>
              <description>Master selection</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>CPOL</name>
              <description>Clock polarity</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>CPHA</name>
              <description>Clock phase</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>CR2</name>
          <displayName>CR2</displayName>
          <description>control register 2</description>
          <addressOffset>0x4</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
		    <field>
              <name>SLVFM</name>
              <description>Slave fast mode enable</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
		    <field>
              <name>LDMA_TX</name>
              <description>Last DAM Transmit(TX)</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
		    <field>
              <name>LDMA_RX</name>
              <description>Last DAM Transmit(RX)</description>
              <bitOffset>13</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>FRXTH</name>
              <description>FIFO reception threshold</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DS</name>
              <description>Data length
              </description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>TXEIE</name>
              <description>Tx buffer empty interrupt
              enable</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>RXNEIE</name>
              <description>RX buffer not empty interrupt
              enable</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>ERRIE</name>
              <description>Error interrupt enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>SSOE</name>
              <description>SS output enable</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>TXDMAEN</name>
              <description>Tx buffer DMA enable</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>RXDMAEN</name>
              <description>Rx buffer DMA enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>SR</name>
          <displayName>SR</displayName>
          <description>status register</description>
          <addressOffset>0x8</addressOffset>
          <size>0x20</size>
          <resetValue>0x0002</resetValue>
          <fields>
            <field>
              <name>FTLVL</name>
              <description>FIFO transmission level</description>
              <bitOffset>11</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
			<field>
              <name>FRLVL</name>
              <description>FIFO reception level</description>
              <bitOffset>9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BSY</name>
              <description>Busy flag</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OVR</name>
              <description>Overrun flag</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MODF</name>
              <description>Mode fault</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TXE</name>
              <description>Transmit buffer empty</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXNE</name>
              <description>Receive buffer not empty</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DR</name>
          <displayName>DR</displayName>
          <description>data register</description>
          <addressOffset>0xC</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>DR</name>
              <description>Data register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="SPI1">
      <name>SPI2</name>
      <baseAddress>0x40003800</baseAddress>
      <interrupt>
        <name>SPI2</name>
        <description>SPI2 global Interrupt</description>
        <value>26</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>I2C</name>
      <description>Inter integrated circuit</description>
      <groupName>I2C</groupName>
      <baseAddress>0x40005400</baseAddress>
      <addressBlock>
        <offset>0x0</offset>
        <size>0x400</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>I2C1</name>
        <description>I2C1 global Interrupt</description>
        <value>23</value>
      </interrupt>
      <registers>
       <register>
          <name>CR1</name>
          <displayName>CR1</displayName>
          <description>Control register 1</description>
          <addressOffset>0x0</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>SWRST</name>
              <description>Software reset</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>PEC</name>
              <description>Packet error checking</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>POS</name>
              <description>Acknowledge/PEC Position (for data
              reception)</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>ACK</name>
              <description>Acknowledge enable</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>STOP</name>
              <description>Stop generation</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>START</name>
              <description>Start generation</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>NOSTRETCH</name>
              <description>Clock stretching disable (Slave
              mode)</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>ENGC</name>
              <description>General call enable</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>ENPEC</name>
              <description>PEC enable</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>PE</name>
              <description>Peripheral enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>CR2</name>
          <displayName>CR2</displayName>
          <description>Control register 2</description>
          <addressOffset>0x4</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>LAST</name>
              <description>DMA last transfer</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DMAEN</name>
              <description>DMA requests enable</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>ITBUFEN</name>
              <description>Buffer interrupt enable</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>ITEVTEN</name>
              <description>Event interrupt enable</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>ITERREN</name>
              <description>Error interrupt enable</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>FREQ</name>
              <description>Peripheral clock frequency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>OAR1</name>
          <displayName>OAR1</displayName>
          <description>Own address register 1</description>
          <addressOffset>0x8</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>ADD</name>
              <description>Interface address</description>
              <bitOffset>1</bitOffset>
              <bitWidth>7</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>DR</name>
          <displayName>DR</displayName>
          <description>Data register</description>
          <addressOffset>0x10</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>DR</name>
              <description>8-bit data register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>SR1</name>
          <displayName>SR1</displayName>
          <description>Status register 1</description>
          <addressOffset>0x14</addressOffset>
          <size>0x20</size>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>PECERR</name>
              <description>PEC Error in reception</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OVR</name>
              <description>Overrun/Underrun</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AF</name>
              <description>Acknowledge failure</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ARLO</name>
              <description>Arbitration lost (master
              mode)</description>
              <bitOffset>9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BERR</name>
              <description>Bus error</description>
              <bitOffset>8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TxE</name>
              <description>Data register empty
              (transmitters)</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RxNE</name>
              <description>Data register not empty
              (receivers)</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STOPF</name>
              <description>Stop detection (slave
              mode)</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BTF</name>
              <description>Byte transfer finished</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ADDR</name>
              <description>Address sent (master mode)/matched
              (slave mode)</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SB</name>
              <description>Start bit (Master mode)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SR2</name>
          <displayName>SR2</displayName>
          <description>Status register 2</description>
          <addressOffset>0x18</addressOffset>
          <size>0x20</size>
          <access>read-only</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>PEC</name>
              <description>acket error checking
              register</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
            </field>
            <field>
              <name>DUALF</name>
              <description>Dual flag (Slave mode)</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>GENCALL</name>
              <description>General call address (Slave
              mode)</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>TRA</name>
              <description>Transmitter/receiver</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>BUSY</name>
              <description>Bus busy</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>MSL</name>
              <description>Master/slave</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>CCR</name>
          <displayName>CCR</displayName>
          <description>Clock control register</description>
          <addressOffset>0x1C</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>F_S</name>
              <description>I2C master mode selection</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DUTY</name>
              <description>Fast mode duty cycle</description>
              <bitOffset>14</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>CCR</name>
              <description>Clock control register in Fast/Standard
              mode (Master mode)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>TRISE</name>
          <displayName>TRISE</displayName>
          <description>TRISE register</description>
          <addressOffset>0x20</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0002</resetValue>
          <fields>
            <field>
              <name>TRISE</name>
              <description>Maximum rise time in Fast/Standard mode
              (Master mode)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
   <peripheral>
      <name>LED</name>
      <description>LED CONTROLLER</description>
      <groupName>LED</groupName>
      <baseAddress>0x40002400</baseAddress>
      <addressBlock>
        <offset>0x0</offset>
        <size>0x400</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>LED</name>
        <description>LED global Interrupt</description>
        <value>30</value>
      </interrupt>
      <registers>
        <register>
          <name>CR</name>
          <displayName>LED_CR</displayName>
          <description>Control register </description>
          <addressOffset>0x0</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>EHS</name>
              <description>Light control</description>
              <bitOffset>12</bitOffset>
              <bitWidth>2</bitWidth>
            </field>
            <field>
              <name>IE</name>
              <description>LED interrupt enable</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>LED_COM_SEL</name>
              <description>LED COM Selection</description>
              <bitOffset>1</bitOffset>
              <bitWidth>2</bitWidth>
            </field>
            <field>
              <name>LEDON</name>
              <description>LED enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>PR</name>
          <displayName>LED_PR</displayName>
          <description>Prescaler register</description>
          <addressOffset>0x4</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>PR</name>
              <description>Prescaler control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>TR</name>
          <displayName>LED_TR</displayName>
          <description>Time register </description>
          <addressOffset>0x8</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>T2</name>
              <description>Switch time</description>
              <bitOffset>8</bitOffset>
              <bitWidth>8</bitWidth>
            </field>
            <field>
              <name>T1</name>
              <description>Light on time</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>DR0</name>
          <displayName>LED_DR0</displayName>
          <description>Data0 register</description>
          <addressOffset>0x0C</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
			<field>
              <name>DATA0_DP</name>
              <description>8-bit data register</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA0_G</name>
              <description>8-bit data register</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA0_F</name>
              <description>8-bit data register</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA0_E</name>
              <description>8-bit data register</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA0_D</name>
              <description>8-bit data register</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA0_C</name>
              <description>8-bit data register</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA0_B</name>
              <description>8-bit data register</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DATA0_A</name>
              <description>8-bit data register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>DR1</name>
          <displayName>LED_DR1</displayName>
          <description>Data1 register</description>
          <addressOffset>0x10</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>DATA1_DP</name>
              <description>8-bit data register</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA1_G</name>
              <description>8-bit data register</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA1_F</name>
              <description>8-bit data register</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA1_E</name>
              <description>8-bit data register</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA1_D</name>
              <description>8-bit data register</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA1_C</name>
              <description>8-bit data register</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA1_B</name>
              <description>8-bit data register</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DATA1_A</name>
              <description>8-bit data register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>DR2</name>
          <displayName>LED_DR2</displayName>
          <description>Data2 register</description>
          <addressOffset>0x14</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>DATA2_DP</name>
              <description>8-bit data register</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA2_G</name>
              <description>8-bit data register</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA2_F</name>
              <description>8-bit data register</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA2_E</name>
              <description>8-bit data register</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA2_D</name>
              <description>8-bit data register</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA2_C</name>
              <description>8-bit data register</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA2_B</name>
              <description>8-bit data register</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DATA2_A</name>
              <description>8-bit data register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>DR3</name>
          <displayName>LED_DR3</displayName>
          <description>Data3 register</description>
          <addressOffset>0x18</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>DATA3_DP</name>
              <description>8-bit data register</description>
              <bitOffset>7</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA3_G</name>
              <description>8-bit data register</description>
              <bitOffset>6</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA3_F</name>
              <description>8-bit data register</description>
              <bitOffset>5</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA3_E</name>
              <description>8-bit data register</description>
              <bitOffset>4</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA3_D</name>
              <description>8-bit data register</description>
              <bitOffset>3</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA3_C</name>
              <description>8-bit data register</description>
              <bitOffset>2</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
			<field>
              <name>DATA3_B</name>
              <description>8-bit data register</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DATA3_A</name>
              <description>8-bit data register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>IR</name>
          <displayName>LED_IR</displayName>
          <description>Interrupt register 1</description>
          <addressOffset>0x1C</addressOffset>
          <size>0x20</size>
          <resetValue>0x0000</resetValue>
          <fields>
            <field>
              <name>FLAG</name>
              <description> interrupt flag</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>                 
          </fields>
        </register>
      </registers>
    </peripheral>
	<peripheral>
      <name>DBGMCU</name>
      <description>Debug support</description>
      <groupName>DBGMCU</groupName>
      <baseAddress>0x40015800</baseAddress>
      <addressBlock>
        <offset>0x0</offset>
        <size>0x400</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
		  <register>
			  <name>IDCODE</name>
			  <displayName>IDCODE</displayName>
			  <description>MCU Device ID Code Register</description>
			  <addressOffset>0x0</addressOffset>
			  <size>0x20</size>
			  <access>read-only</access>
			  <resetValue>0x0</resetValue>
			  <fields>

			  </fields>
		  </register>
        <register>
          <name>CR</name>
          <displayName>CR</displayName>
          <description>Debug MCU Configuration
          Register</description>
          <addressOffset>0x4</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0</resetValue>
          <fields>
            <field>
              <name>DBG_STOP</name>
              <description>Debug Stop Mode</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>APB_FZ1</name>
          <displayName>APB_FZ1</displayName>
          <description>APB Freeze Register1</description>
          <addressOffset>0x8</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0</resetValue>
          <fields>
            <field>
              <name>DBG_TIMER3_STOP</name>
              <description>Debug Timer 3 stopped when Core is
              halted</description>
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DBG_RTC_STOP</name>
              <description>Debug RTC stopped when Core is
              halted</description>
              <bitOffset>10</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DBG_WWDG_STOP</name>
              <description>Debug Window Wachdog stopped when Core
              is halted</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DBG_IWDG_STOP</name>
              <description>Debug Independent Wachdog stopped when
              Core is halted</description>
              <bitOffset>12</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DBG_LPTIM_STOP</name>
              <description>Debug LPTIM stopped when Core is
              halted</description>
              <bitOffset>31</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
        <register>
          <name>APB_FZ2</name>
          <displayName>APB_FZ2</displayName>
          <description>APB Freeze Register2</description>
          <addressOffset>0xC</addressOffset>
          <size>0x20</size>
          <access>read-write</access>
          <resetValue>0x0</resetValue>
          <fields>
            <field>
              <name>DBG_TIMER1_STOP</name>
              <description>Debug Timer 1 stopped when Core is
              halted</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DBG_TIMER14_STOP</name>
              <description>Debug Timer 14 stopped when Core is
              halted</description>
              <bitOffset>15</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DBG_TIMER16_STOP</name>
              <description>Debug Timer 16 stopped when Core is
              halted</description>
              <bitOffset>17</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
            <field>
              <name>DBG_TIMER17_STOP</name>
              <description>Debug Timer 17 stopped when Core is
              halted</description>
              <bitOffset>18</bitOffset>
              <bitWidth>1</bitWidth>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
  </peripherals>
</device>
